u-boot.git/drivers/usb, branch v2026.04

Revert "usb: cdns3: use VBUS Valid to determine role for dr_mode OTG"

2026-04-03T23:50:16+00:00

While USB DFU boot works with this patch, but the non USB boot modes like
SD Boot and flash boot fails for J784S4 EVM device.

So, Reverting this patch.

This reverts commit bfb530e06ca6c19f66c079601e568c761a001993.

Signed-off-by: Prasanth Babu Mantena

treewide: Remove Timesys from ADI ADSP maintenance

2026-03-04T20:25:27+00:00

After years of developing the ADI ADSP platform, Timesys was purchased
by another company and is no longer contracted to maintain the platform.

Signed-off-by: Philip Molloy 
Reviewed-by: Greg Malysa

usb: cdns3: use VBUS Valid to determine role for dr_mode OTG

2026-02-16T14:08:43+00:00

The cdns3_bind() function is responsible for identifying the appropriate
driver to bind to the USB Controller's device-tree node. If the device-tree
node has the 'dr_mode' property set to 'otg', the existing approach fails
to bind a driver, leading to loss of functionality.

To address this, use the VBUS Valid field of the OTG Status register to
determine the role as follows:
- If VBUS Valid field is set, it indicates that a USB Host is supplying
  power and the Controller should assume the Peripheral role.
- If VBUS Valid field is clear, it indicates the absence of a USB Host and
  the Controller should assume the Host role.

Additionally, when 'dr_mode' happens to be 'otg' and the STRAP settings
are not specified, use VBUS Valid to determine the role in cdns3_drd_init()
and assign it to cdns->dr_mode.

Signed-off-by: Siddharth Vadapalli 
Reviewed-by: Marek Vasut

usb: gadget: dwc2: Move dr_mode check from of_to_plat() to bind()

2026-01-30T08:01:42+00:00

Rockchip RK3288 and RK3506 contain two DWC2 USB controllers, typically
one controller use dr_mode=otg and the other one use dr_mode=host.

With USB_GADGET_DWC2_OTG, DM_USB_GADGET and USB_DWC2 enabled this result
in the dwc2-udc-otg driver binding to both controllers, however only one
will probe due to use of dr_mode=host on the other one.

After the commit 6668b8e7cc68 ("dm: core: Support multiple drivers with
same compatibles") it is possible to bind one controller to the
dwc2-udc-otg driver and the other one to the dwc2_usb driver.

Move the dr_mode check from of_to_plat() to bind() to allow dm core to
bind the dwc2 host driver to dr_mode=host controllers.

Before this:

  => dm tree
   ...
   usb_gadget    0  [   ]   dwc2-udc-otg          |   |-- usb@ff740000
   usb_gadget    1  [   ]   dwc2-udc-otg          |   |-- usb@ff780000

  => usb start
  starting USB...
  No USB controllers found

After this:

  dwc2-udc-otg usb@ff780000: Invalid dr_mode 1

  => dm tree
   ...
   usb_gadget    0  [   ]   dwc2-udc-otg          |   |-- usb@ff740000
   usb           0  [   ]   dwc2_usb              |   |-- usb@ff780000

  => usb start
  starting USB...
  USB DWC2
  Bus usb@ff780000: 1 USB Device(s) found

Signed-off-by: Jonas Karlman 
Reviewed-by: Mattijs Korpershoek 
Reviewed-by: Marek Vasut 
Link: https://lore.kernel.org/r/20260129195207.2260264-1-jonas@kwiboo.se
Signed-off-by: Mattijs Korpershoek

usb: dwc3: core: improve reset sequence

2026-01-30T07:59:21+00:00

According to Synopsys Databook, we shouldn't be
relying on GCTL.CORESOFTRESET bit as that's only for
debugging purposes. Instead, let's use DCTL.CSFTRST
if we're OTG or PERIPHERAL mode.

Host side block will be reset by XHCI driver if
necessary. Note that this reduces amount of time
spent on dwc3_probe() by a long margin.

We're still gonna wait for reset to finish for a
long time (default to 1ms max), but tests show that
the reset polling loop executed at most 19 times
(modprobe dwc3 && modprobe -r dwc3 executed 1000
times in a row).

Note that this patch was submitted to Linux in 2016 [1], however I can
confirm it is needed to support gadget mode in U-Boot on my device.
While I am referencing this patch from Linux I am in fact taking the
full existing dwc3_core_soft_reset() function from Linux as it exists
in v6.19-rc5, so it may differ slightly from the information in the
2016 patch.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/drivers/usb/dwc3?id=f59dcab176293b646e1358144c93c58c3cda2813

Suggested-by: Mian Yousaf Kaukab 
Signed-off-by: Felipe Balbi 
Signed-off-by: Chris Morgan 
Reviewed-by: Mattijs Korpershoek 
Link: https://lore.kernel.org/r/20260115230135.183158-5-macroalpha82@gmail.com
Signed-off-by: Mattijs Korpershoek

usb: dwc3: gadget: Don't send unintended link state change

2026-01-30T07:59:21+00:00

DCTL.ULSTCHNGREQ is a write-only field. When doing a read-modify-write
to DCTL, the driver must make sure that there's no unintended link state
change request from whatever is read from DCTL.ULSTCHNGREQ. Set link
state change to no-action when the driver writes to DCTL.

Note that this patch was submitted upstream in Linux in 2020 [1],
and I've confirmed I need it in U-Boot to enable gadget mode.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/drivers/usb/dwc3?id=5b738211fb59e114727381d07c647a77c0010996

Signed-off-by: Thinh Nguyen 
Signed-off-by: Chris Morgan 
Reviewed-by: Mattijs Korpershoek 
Link: https://lore.kernel.org/r/20260115230135.183158-4-macroalpha82@gmail.com
Signed-off-by: Mattijs Korpershoek

usb: dwc3: Increase DWC3 controller halt timeout

2026-01-30T07:59:21+00:00

Since EP0 transactions need to be completed before the controller halt
sequence is finished, this may take some time depending on the host and the
enabled functions.  Increase the controller halt timeout, so that we give
the controller sufficient time to handle EP0 transfers.

This patch was originally submitted to Linux in 2022, but is required to
use USB gadget mode on my device in U-Boot.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=461ee467507cb98a348fa91ff8460908bb0ea423

Signed-off-by: Wesley Cheng 
Signed-off-by: Chris Morgan 
Reviewed-by: Mattijs Korpershoek 
Link: https://lore.kernel.org/r/20260115230135.183158-3-macroalpha82@gmail.com
Signed-off-by: Mattijs Korpershoek

usb: dwc3: core: Add ip and version_type support from Linux

2026-01-30T07:59:21+00:00

Add support for the ip and version_type fields from the Linux
version of the dwc3 driver. Included in this is support for a
few additional macros in the header from Linux as well.

Signed-off-by: Chris Morgan 
Reviewed-by: Mattijs Korpershoek 
Link: https://lore.kernel.org/r/20260115230135.183158-2-macroalpha82@gmail.com
Signed-off-by: Mattijs Korpershoek

usb: xhci: fix DMA address corruption in abort_td

2026-01-25T09:40:42+00:00

When aborting a Transfer Descriptor (TD), the xHCI driver updates the
device dequeue pointer by converting the virtual enqueue TRB pointer
into a DMA address.

Previously, the code OR-ed the ring's Dequeue Cycle State (DCS) bit into
the virtual TRB pointer before passing it to xhci_trb_virt_to_dma().
This produced an unaligned virtual address (e.g. ending in 0x...1).

Inside xhci_trb_virt_to_dma(), the offset calculation:

segment_offset = trb - seg->trbs;

operated on this unaligned pointer, resulting in an incorrect TRB index.
In wraparound cases, this caused the bounds check to fail and the
function to return 0.

As a result, a SET_DEQ_PTR command was issued with a DMA address of 0x0,
leading to controller hangs and transfer timeouts, most commonly when
aborting TDs near the end of a ring segment (e.g. index 63).

Fix this by translating the aligned virtual TRB pointer to a DMA address
first, and only then applying the DCS bit to the resulting physical
address.

Reviewed-by: Marek Vasut 
Signed-off-by: ANANDHAKRISHNAN S

arm: Remove remainder of ARCH_ORION5X

2026-01-21T18:05:15+00:00

With commit 5663b137e682 ("arm: Remove edminiv2 board") the last
ARCH_ORION5X platform was removed. Remove the rest of the architecture
code which is now unused.

Reviewed-by: Tony Dinh 
Signed-off-by: Tom Rini