u-boot.git/drivers/video, branch v2020.07-rc2

video: omap: change include order

2020-05-11T04:46:49Z

Apply u-boot coding style on include files order as described by the wiki https://www.denx.de/wiki/U-Boot/CodingStyle. Signed-off-by: Dario Binacchi

Merge tag 'u-boot-imx-20200502' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

2020-05-04T13:29:42Z

i.MX for 2020.07 ---------------- - imxrt: fix LCD clock, fix doc - new board: Coral Dev - imx8: enable Cache in SPL. SNVS, update SCFW API - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading - MX6ULL : is_imx6ull to include i.MX6ULZ - Net: add config to enable TXC delay Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914

video: mxsfb: add clk_enable()

2020-05-01T17:03:18Z

BROM doesn't enable lcdif by default so add clk_enable() after clk_set_rate(). Signed-off-by: Giulio Benetti Reviewed-by: Anatolij Gustschin Reviewed-by: Fabio Estevam

rockchip: video: Convert to use APIs which support live DT

2020-04-28T10:05:08Z

Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Kever Yang Reviewed-by: Simon Glass

rockchip: video: Use ofnode_decode_display_timing() to parse timing

2020-04-28T10:05:08Z

Use ofnode_decode_display_timing() instead of fdtdec_decode_display_timing() to parse display timing, so that we can support live DT. Signed-off-by: Kever Yang Reviewed-by: Simon Glass

video: simple_panel: add boe,nv140fhmn49 display

2020-04-26T21:04:49Z

add "boe,nv140fhmn49" display to compatible node. Signed-off-by: Peter Robinson Cc: Anatolij Gustschin

drivers: video: rockchip: fix building eDP and LVDS drivers

2020-04-26T20:58:50Z

The rk_edp.c and rk_lvds.c files reference rk_setreg which is declared in hardware.h so include it so the drivers build. Adjust rk_lvds.c so includes are in alphabetical order while updating. Signed-off-by: Peter Robinson Reviewed-by: Anatolij Gustschin Tested-by: Vagrant Cascadian

video: mxsfb: enable setting ENABLE negative polarity

2020-04-18T10:54:43Z

ENABLE signal can now be flipped by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti Reviewed-by: Anatolij Gustschin

video: mxsfb: enable setting PIXDATA on negative edge

2020-04-18T10:54:43Z

DOTCLK signal can now be flipped by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti Reviewed-by: Anatolij Gustschin

video: mxsfb: enable setting VSYNC negative polarity

2020-04-18T10:54:43Z

VSYNC signal can now be flipped by writing its bitmask on vdctrl0 register. Signed-off-by: Giulio Benetti Reviewed-by: Anatolij Gustschin