<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/video, branch v2023.07.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/video?h=v2023.07.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/video?h=v2023.07.01'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2023-06-12T11:25:02Z</updated>
<entry>
<title>video: zynqmp: Enable 1024x768 resolution</title>
<updated>2023-06-12T11:25:02Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2023-05-17T08:42:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=322c0da86aa8ba72dd5cbcd83db60d4d3d8af4de'/>
<id>urn:sha1:322c0da86aa8ba72dd5cbcd83db60d4d3d8af4de</id>
<content type='text'>
Add support for 1024x768 60p resolution and set it up this resolution by
default. This resolution is still able to use only one GT line. But for
example 800x600 60p has some issues with settings. That's why extend this
table by tested resolutions.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/957e1e85a05744326ec2606dadc1af6e69976f37.1684312924.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>video: zynqmp: Driver for Xilinx ZynqMP DisplayPort Subsystem</title>
<updated>2023-06-12T11:25:01Z</updated>
<author>
<name>Venkatesh Yadav Abbarapu</name>
<email>venkatesh.abbarapu@amd.com</email>
</author>
<published>2023-05-17T08:42:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a29f44d631acfb123a5c810561066b14c8a037b2'/>
<id>urn:sha1:a29f44d631acfb123a5c810561066b14c8a037b2</id>
<content type='text'>
The Xilinx ZynqMP SoC has a hardened display pipeline named DisplayPort
Subsystem. It includes a buffer manager, blender, an audio mixer and a
DisplayPort source controller (transmitter). The DisplayPort controller can
source data from memory (non-live input) or the stream (live input). The
DisplayPort controller is responsible for managing the link and physical
layer functionality. The controller packs audio/video data into transfer
units and sends them over the main link. The link rate and lane counts can
be selected based on the application bandwidth requirements. The
DisplayPort pipeline consists of the DisplayPort direct memory access (DMA)
for fetching data from memory. The DisplayPort DMA controller (DPDMA)
supports up to six input channels as non-live input.

This driver supports the DisplayPort Subsystem and implements
1)640x480 resolution
2)RGBA8888 32bpp format
3)DPDMA channel 3 for Graphics
4)Non-live input
5)Fixed 5.4G link rate
6)Tested on ZCU102 board

There will be additional work to configure GT lines based on DT, higher
resolutions, support for more compressed video formats, spliting code to
more files, add support for EDID, audio support, using clock framework for
all clocks and in general code clean up.

Codevelop-by: Michal Simek &lt;michal.simek@amd.com&gt;
Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@amd.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/5c1567b63d0280dacc7efba2998857c399c25358.1684312924.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>video: move zynqmp files to subdirectory</title>
<updated>2023-06-12T11:25:01Z</updated>
<author>
<name>Venkatesh Yadav Abbarapu</name>
<email>venkatesh.abbarapu@amd.com</email>
</author>
<published>2023-05-17T08:42:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c4865e1632e203858103958631ba3ceca1e758b5'/>
<id>urn:sha1:c4865e1632e203858103958631ba3ceca1e758b5</id>
<content type='text'>
Place zynqmp files and headers in custom driver subdirectory.

Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@amd.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/9aae6d217f0673c310818e3de38bb239c79c060c.1684312924.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>video: bmp: Support rgba8888 pixel format</title>
<updated>2023-06-12T11:25:01Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2023-05-17T08:42:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f6de01d6af54ff4a2dddc6ca53984c826e2830fa'/>
<id>urn:sha1:f6de01d6af54ff4a2dddc6ca53984c826e2830fa</id>
<content type='text'>
Adding the support for RGBA8888 format for BMP decoding.

Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@amd.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/322910eb24692f6140a001796501270eb1c53d9a.1684312924.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>video: Add support for RGBA8888 format</title>
<updated>2023-06-12T11:25:01Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2023-05-17T08:42:07Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e9500ba9e032bc5e976578e256582c86fcb62d0d'/>
<id>urn:sha1:e9500ba9e032bc5e976578e256582c86fcb62d0d</id>
<content type='text'>
Add support for RGBA8888 32bpp format where pixels are picked in
32-bit integers, where the colors are stored in memory such that
R is at lowest address, G after that, B after that, and A last.

Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@amd.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/aa1de54b7d4ff46df6858f76d52634e0c5c71a4a.1684312924.git.michal.simek@amd.com
</content>
</entry>
<entry>
<title>video: tweak CONFIG_SPL_VIDEO description</title>
<updated>2023-05-15T21:14:46Z</updated>
<author>
<name>John Keeping</name>
<email>john@metanate.com</email>
</author>
<published>2023-05-09T11:02:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=03972ff6719456e1a1b11d520edb332a7c6a0e9b'/>
<id>urn:sha1:03972ff6719456e1a1b11d520edb332a7c6a0e9b</id>
<content type='text'>
Make it clear that this is the SPL option to avoid potential confusion
when the description for CONFIG_SPL_VIDEO is the same as that for
CONFIG_VIDEO.

Signed-off-by: John Keeping &lt;john@metanate.com&gt;
</content>
</entry>
<entry>
<title>drivers: use dev_read_addr_ptr when cast to pointer</title>
<updated>2023-05-06T09:28:18Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2023-03-13T00:32:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a12a73b66476c48dfe5afd2c3711153d09feda6c'/>
<id>urn:sha1:a12a73b66476c48dfe5afd2c3711153d09feda6c</id>
<content type='text'>
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_ptr instead of the dev_read_addr function in the
various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>video: panel: add generic endeavoru panel</title>
<updated>2023-04-26T05:35:57Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2023-04-25T07:51:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=def72d5c6265bde4e9eb7976db53a77fabc4808a'/>
<id>urn:sha1:def72d5c6265bde4e9eb7976db53a77fabc4808a</id>
<content type='text'>
Family of panels used by HTC in One X. Though were used variants
at least from 3 vendors, this driver provides generic support for
all of them.

Tested-by: Ion Agorria &lt;ion@agorria.com&gt; # HTC One X T30 Sony
Tested-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt; # HTC One X T30 Sharp
Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>video: tegra: add DC based PWM backlight driver</title>
<updated>2023-04-26T05:32:25Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2023-04-25T07:51:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d8cca91380c0bd7ed83d90a200b674b1fae8c544'/>
<id>urn:sha1:d8cca91380c0bd7ed83d90a200b674b1fae8c544</id>
<content type='text'>
DC based PWM backlight is found on some T20 and T30 devices
(HTC One X). This backlight is controlled by Tegra DC and
is adjustable by the DC PM0 or PM1 signal.

Tested-by: Andreas Westman Dorcsak &lt;hedmoo@yahoo.com&gt; # HTC One X T30
Tested-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt; # HTC One X T30
Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>video: panel: add Renesas R69328 MIPI DSI panel driver</title>
<updated>2023-04-26T05:29:12Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2023-04-25T07:51:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6d9b3a7e837d8fe4d3856780c35ee9f40865ff8d'/>
<id>urn:sha1:6d9b3a7e837d8fe4d3856780c35ee9f40865ff8d</id>
<content type='text'>
Driver adds support for panels with Renesas R69328 IC

Currently supported compatible is:
- jdi,dx12d100vm0eaa

Tested-by: Andreas Westman Dorcsak &lt;hedmoo@yahoo.com&gt; # LG P880 T30
Tested-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt; # LG P895 T30
Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
</feed>
