u-boot.git/drivers/watchdog, branch v2016.01-rc2

ls102xa: Fix reset hang

2015-10-12T16:56:32Z

Since commit 623d96e89aca6("imx: wdog: correct wcr register settings") issuing a 'reset' command causes the system to hang. Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian. This means that the watchdog on LS1021 has been working by accident as it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c. Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only revelead the endianness problem on LS102x. In order to fix the reset hang, introduce a reset_cpu() implementation that is specific for ls102x, which accesses the watchdog WCR register in big-endian format. All that is required to reset LS102x is to clear the SRS bit. This approach is a temporary workaround to avoid a regression for LS102x in the 2015.10 release. The proper fix is to make the watchdog driver endian-aware, so that it can work for i.MX, Vybrid and LS102x. Reported-by: Sinan Akman Tested-by: Sinan Akman Reviewed-by: Wolfgang Denk Signed-off-by: Fabio Estevam

imx_watchdog: Add a header file for watchdog registers

2015-10-12T16:56:26Z

Create fsl_wdog.h to store the watchdog registers and bit fields. This can be useful when accesses to the watchdog block are made from other parts, such as arch/arm/ cpu code. Signed-off-by: Fabio Estevam

imx: wdog: correct wcr register settings

2015-09-20T07:39:35Z

We should not simple use "writew(WCR_WDE, &wdog->wcr)" to set wcr, since this will override bits set before reset_cpu. Use clrsetbits_le16 instead of writew to fix this issue. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam Cc: Sebastian Siewior Tested-by: Fabio Estevam

imx: imx7d: add imx-common cpu support for imx7d

2015-09-13T08:11:54Z

Add imx-common cpu support for imx7d SoC - Update reset_cause for imx7d - Enable watchdog driver built for imx7d Signed-off-by: Adrian Alonso Signed-off-by: Peng Fan

watchdog/imx_watchdog: do not set WCR_WDW

2015-03-25T15:52:16Z

with WCR_WDW set, the watchdog won't trigger if we bootet linux and idle around while the watchdog is not triggered. It seems the timer makes progress very slowly if at all. I managed to remain 20minutes alive while the timeout was set to 60secs. It reboots within 60secs if I start a busyloop in userland (something like "while (1) { }"). While I don't see a reason why the WDT should not be running while the CPU is in idle, I'm dropping this bit. Signed-off-by: Sebastian Andrzej Siewior Acked-by: Stefano Babic

ARM: remove tnetv107x board support

2015-02-24T22:07:24Z

This is still a non-generic board. Signed-off-by: Masahiro Yamada Cc: Chan-Taek Park Acked-by: Marek Vasut

arm, at91, wdt: make timeout configurable

2015-02-07T22:43:20Z

make the HW WDT timeout configurable through the define CONFIG_AT91_HW_WDT_TIMEOUT. Signed-off-by: Heiko Schocher

kconfig: add blank Kconfig files

2014-09-24T22:30:28Z

This would be useful to start moving various config options. Signed-off-by: Masahiro Yamada Acked-by: Simon Glass Tested-by: Simon Glass

arm: ls102xa: Add Freescale LS102xA SoC support

2014-09-08T17:30:32Z

The QorIQ LS1 family is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been optimized for high reliability and pack the highest level of integration available for sub-3 W embedded communications processors with Layerscape architecture and with a comprehensive enablement model focused on ease of programmability. Signed-off-by: Alison Wang Signed-off-by: Jason Jin Signed-off-by: Jingchang Lu Signed-off-by: Prabhakar Kushwaha

blackfin: Fix warning about undefined function

2014-07-07T23:47:09Z

get_sclk() was not defined in bfin_wdt.c, include the corresponding header. Cc: Sonic Zhang Signed-off-by: Vasili Galka