u-boot.git/drivers, branch v2011.03-rc2 Unnamed repository; edit this file 'description' to name the repository. Coding Style cleanup: remove trailing empty lines 2011-03-27T19:48:08+00:00 Wolfgang Denk wd@denx.de 2011-03-27T19:48:08+00:00 14666418e9aa3c7480c640cd8e86935b64f05433 Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
S5P: mmc: Resolved interrupt error during mmc_init 2011-03-27T17:20:26+00:00 Chander Kashyap chander.kashyap@linaro.org 2011-03-22T01:40:50+00:00 f69bb511455513a61c25783414240258f13f3371 Blocksize was hardcoded to 512 bytes. But the blocksize varies depeding on various mmc subsystem commands (between 8 and 512). This hardcoding was resulting in interrupt error during data transfer. It is now calculated based upon the request sent by mmc subsystem. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> 
Blocksize was hardcoded to 512 bytes. But the blocksize varies
depeding on various mmc subsystem commands (between 8 and 512).
This hardcoding was resulting in interrupt error during data
transfer.

It is now calculated based upon the request sent by mmc subsystem.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
net: ftmac100: update get_timer() usages 2011-03-21T21:54:23+00:00 Po-Yu Chuang ratbert@faraday-tech.com 2011-01-21T07:51:25+00:00 8d8fd5b69614d84aa39bf4a624eda9c76d154837 Use get_timer() the same way as drivers/net/ftgmac100.c Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Reviewed-by: Macpaul Lin <macpaul@gmail.com> Tested-by: Macpaul Lin <macpaul@gmail.com> 
Use get_timer() the same way as drivers/net/ftgmac100.c

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Reviewed-by: Macpaul Lin <macpaul@gmail.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
net: ftmac100: remove unnecessary volatiles 2011-03-21T21:53:30+00:00 Po-Yu Chuang ratbert@faraday-tech.com 2011-01-21T07:50:37+00:00 6f6e6e09b24e9a9dfa4af28f3e7704d335411cb4 Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Reviewed-by: Macpaul Lin <macpaul@gmail.com> Tested-by: Macpaul Lin <macpaul@gmail.com> 
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Reviewed-by: Macpaul Lin <macpaul@gmail.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
net: sh_eth: add support for SH7757's ETHER 2011-03-16T01:16:34+00:00 Yoshihiro Shimoda yoshihiro.shimoda.uh@renesas.com 2011-01-18T08:53:45+00:00 903de461e4519ae073b4c0e967838c220fa5e5b0 SH7757 has ETHER and GETHER. This patch supports EHTER only. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 
SH7757 has ETHER and GETHER. This patch supports EHTER only.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
fsl_esdhc: Correcting esdhc timeout counter calculation 2011-03-07T14:49:28+00:00 Priyanka Jain Priyanka.Jain@freescale.com 2011-03-03T03:48:56+00:00 b71ea33699bb694964929e2cdced80ef794bde69 - Timeout counter value is set as DTOCV bits in SYSCTL register For counter value set as timeout, Timeout period = (2^(timeout + 13)) SD Clock cycles - As per 4.6.2.2 section of SD Card specification v2.00, host should cofigure timeout period value to minimum 0.25 sec. - Number of SD Clock cycles for 0.25sec should be minimum (SD Clock/sec * 0.25 sec) SD Clock cycles = (mmc->tran_speed * 1/4) SD Clock cycles - Calculating timeout based on (2^(timeout + 13)) >= mmc->tran_speed * 1/4 Taking log2 both the sides and rounding up to next power of 2 => timeout + 13 = log2(mmc->tran_speed/4) + 1 Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
- Timeout counter value is set as DTOCV bits in SYSCTL register
  For counter value set as timeout,
  Timeout period = (2^(timeout + 13)) SD Clock cycles

- As per 4.6.2.2 section of SD Card specification v2.00, host should
  cofigure timeout period value to minimum 0.25 sec.

- Number of SD Clock cycles for 0.25sec should be minimum
	(SD Clock/sec * 0.25 sec) SD Clock cycles
	= (mmc->tran_speed * 1/4) SD Clock cycles

- Calculating timeout based on
	(2^(timeout + 13)) >=  mmc->tran_speed * 1/4
	Taking log2 both the sides and rounding up to next power of 2
	=> timeout + 13 = log2(mmc->tran_speed/4) + 1

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fsl_law: Fix LAW printing function 2011-02-23T05:25:19+00:00 Kumar Gala galak@kernel.crashing.org 2011-02-12T21:34:08+00:00 8e29ebabf825ee0c85cb0c93d6aa495cc54811ab We had an extra '0x' in the output of the LAWAR header that would cause output like: LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d intead of: LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d Signed-off-by: Kumar Gala <galak@kernel.crashing.org> 
We had an extra '0x' in the output of the LAWAR header that would cause
output like:

LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d

intead of:

LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
mvmfp: add MFP configuration support for PANTHEON 2011-02-21T07:30:55+00:00 Lei Wen [leiwen@marvell.com] 2011-02-09T12:36:58+00:00 a03774ed88dd43acb57979d3439c2f5951379b6b This patch adds the Multiple Function Pin configuration support for Marvell PANTHEON SoCs Signed-off-by: Lei Wen <leiwen@marvell.com> 
This patch adds the Multiple Function Pin configuration support for
Marvell PANTHEON SoCs

Signed-off-by: Lei Wen <leiwen@marvell.com>
serial: add pantheon soc support 2011-02-21T07:30:55+00:00 Lei Wen [leiwen@marvell.com] 2011-02-09T12:36:58+00:00 b5d807f64d25d7d2859cc8e9f9d0e7242778eb46 Signed-off-by: Lei Wen <leiwen@marvell.com> 
Signed-off-by: Lei Wen <leiwen@marvell.com>
serial: Add Tegra2 serial port support 2011-02-21T07:30:55+00:00 Tom Warren twarren.nvidia@gmail.com 2011-01-27T10:58:06+00:00 2ee3678159c30dfbe1c0ed2511197e29b0e1f85c Signed-off-by: Tom Warren <twarren@nvidia.com> 
Signed-off-by: Tom Warren <twarren@nvidia.com>