* 'master' of git://git.denx.de/u-boot-usb:
  usb_storage: fix ehci driver max transfer size
  smsc95xx: align buffers to cache line size
  ehci-hcd: change debug() to printf() in case of errors
  usb: check return value of submit_{control, bulk}_msg
  usb: pass cache-aligned buffer to usb_get_descriptor()
  ehci-hcd: fix external buffer cache handling
  ehci-hcd.c, musb_core, usb.h: Add USB_DMA_MINALIGN define for cache alignment
  ehci-hcd: program asynclistaddr before every transfer
  common.h: Introduce DEFINE_CACHE_ALIGN_BUFFER
  ehci-omap: Do not call dcache_off from omap_ehci_hcd_init

Signed-off-by: Wolfgang Denk <wd@denx.de>

* 'sf' of git://git.denx.de/u-boot-blackfin:
  sf: spansion: inline useless id defines
  sf: drop unused/duplicate command defines

Signed-off-by: Wolfgang Denk <wd@denx.de>

No need for dedicated defines when these really only get used once.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

In an effort to unify the spi flash drivers further, drop all the
unused and/or duplicate command defines.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Now that common code doesn't declare these as volatile, we don't need to
either anymore.  This fixes the build warning:

bfin_mac.c: In function 'bfin_EMAC_recv':
bfin_mac.c:193:23: warning: assignment discards qualifiers from pointer target type

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Align buffers passed to the USB code to cache line size so
they can be DMAed safely.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

Printing message could be useful if something goes really wrong.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

Buffer coming from upper layers should be cacheline aligned/padded
to perform safe cache operations. For now we don't do bounce
buffering so getting unaligned buffer is an upper layer error.
We can't check if the buffer is properly padded with current
interface so just assume it is (consider changing with in the
future). The following changes are done:

1. Remove useless length alignment check. We get actual transfer
length not the size of the underlying buffer so it's perfectly
valid for it to be unaligned.
2. Move flush_dcache_range() out of while loop or it will
flush too much.
3. Don't try to fix buffer address before calling invalidate:
if it's unaligned it's an error anyway so let cache subsystem
cry about that.
4. Fix end buffer address to be cacheline aligned assuming upper
layer reserved enough space. This is potentially dangerous
operation so upper layers should be careful about that.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

The USB spec says that 32 bytes is the minimum required alignment.
However on some platforms we have a larger minimum requirement for cache
coherency.  In those cases, use that value rather than the USB spec
minimum.  We add a cpp check to <usb.h> to define USB_DMA_MINALIGN and
make use of it in ehci-hcd.c and musb_core.h.  We cannot use MAX() here
as we are not allowed to have tests inside of align(...).

Signed-off-by: Tom Rini <trini@ti.com>
[marek.vasut]: introduce some crazy macro voodoo
Signed-off-by: Marek Vasut <marex@denx.de>
[ilya.yanok]: moved external buffer fixes to separate patch,
we use {ALLOC,DEFINE}_ALIGN_BUFFER macros with alignment of USB_DMA_MINALIGN
for qh_list, qh and qtd structures to make sure they are proper aligned
for both controller and cache operations.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

Move or_asynclistaddr programming to ehci_submit_async()
function to make sure queue head is properly programmed
before every transfer. This solves the problem with changing
qh address.

Also remove unneeded qh_list->qh_link reprogramming at the
end of transfer.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>