u-boot.git/drivers, branch v2013.01-rc2

env: Add a baudrate env handler

2012-12-13T18:46:55+00:00

Remove the hard-coded baudrate handler and use a callback instead

Signed-off-by: Joe Hershberger

designware_i2c.h: Define IC_CLK only if not already defined in config file

2012-12-11T20:17:32+00:00

Signed-off-by: Armando Visconti

designware_i2c.h: Fixed the correct values for SCL low/high time

2012-12-11T20:17:32+00:00

Signed-off-by: Armando Visconti

designware_i2c: Fixed the setting of the i2c bus speed

2012-12-11T20:17:32+00:00

There are three couple (hcnt/lcnt) of registers for each
speed (SS/FS/HS). The driver needs to set the proper couple
of regs according to what speed we are setting.

Signed-off-by: Armando Visconti

designware_i2c: Added s/w generation of stop bit

2012-12-11T20:17:32+00:00

In the newer versions of designware i2c IP there is the possibility
of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically
requires the s/w to generate the stop bit condition directly, as
the h/w will not automatically generate it when TX_FIFO is empty.

To avoid generation of an extra 0x0 byte sent as data, the
IC_STOP command must be sent along with the last IC_CMD.

This patch always writes bit[9] of ic_data_cmd even in the
older versions, assuming that it is a noop there.

Signed-off-by: Armando Visconti

designware_i2c.c: Added the support for MULTI_BUS

2012-12-11T20:17:31+00:00

This patch adds the capability to switch between 10
different I2C busses (from 0 to 9).

Signed-off-by: Armando Visconti

drivers:i2c: Modify I2C driver for Exynos4

2012-12-11T20:17:31+00:00

This patch modifies the S3C i2c driver to support both Exynos4 and Exynos5

Signed-off-by: Piotr Wilczek 
Signed-off-by: Kyungmin Park 
CC: Minkyu Kang

omap24xx_i2c: Handle OMAP5 like OMAP2,3,4

2012-12-11T20:17:31+00:00

OMAP5 has 8b i2c data register field, like OMAP2, 3 and 4. Handle in the same
way. This fixes the following error on OMAP5:

  OMAP5430 EVM # mmc rescan
  timed out in wait_for_bb: I2C_STAT=1410
  twl6035: could not turn on LDO9.

Signed-off-by: Vincent Stehlé

mxs: i2c: Implement algorithm to set up arbitrary i2c speed

2012-12-11T20:17:30+00:00

This algorithm computes the values of TIMING{0,1,2} registers for the
MX28 I2C block. This algorithm was derived by using a scope, but the
result seems correct.

The resulting values programmed into the registers do not correlate
with the contents in datasheet. When using the values from the datasheet,
the I2C clock were completely wrong.

Signed-off-by: Marek Vasut 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Wolfgang Denk

mxs: i2c: Restore speed setting after block reset

2012-12-11T20:17:30+00:00

The I2C block reset configures the I2C bus speed to strange value.
Read the I2C speed from the block before reseting the block and
restore it afterwards, so the I2C operates correctly. This issue
can be replicated by doing unsuccessful I2C transfer, after such
transfer finishes, the I2C block clock speed is misconfigured.

Signed-off-by: Marek Vasut 
Cc: Heiko Schocher 
Cc: Fabio Estevam