u-boot.git/drivers, branch v2013.07-rc2 Unnamed repository; edit this file 'description' to name the repository. usb: musb: Use ARRAY_SIZE at appropriate places 2013-06-26T14:26:06+00:00 Axel Lin axel.lin@ingics.com 2013-06-22T16:57:46+00:00 e31dc61e7dc89ce900426828c936208a6638cf8c Signed-off-by: Axel Lin <axel.lin@ingics.com> 
Signed-off-by: Axel Lin <axel.lin@ingics.com>
mtd: cfi_flash: Use ARRAY_SIZE at appropriate places 2013-06-26T14:26:06+00:00 Axel Lin axel.lin@ingics.com 2013-06-22T16:56:46+00:00 31bf0f57b2c322500ceccdc6a38b4a8edb7035f0 Signed-off-by: Axel Lin <axel.lin@ingics.com> 
Signed-off-by: Axel Lin <axel.lin@ingics.com>
hwmon: lm63: Use ARRAY_SIZE at appropriate place 2013-06-26T14:26:06+00:00 Axel Lin axel.lin@ingics.com 2013-06-22T16:55:14+00:00 b98bfeb6674bd33effe9e093f071e7eeb3174f2e Signed-off-by: Axel Lin <axel.lin@ingics.com> 
Signed-off-by: Axel Lin <axel.lin@ingics.com>
serial: Use ARRAY_SIZE instead of reinventing it 2013-06-26T14:26:06+00:00 Axel Lin axel.lin@ingics.com 2013-06-22T16:46:41+00:00 9935175f50398929d83f4af98a7491fcdcbd46c9 Signed-off-by: Axel Lin <axel.lin@ingics.com> 
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Fix block device accesses beyond 2TiB 2013-06-26T14:26:06+00:00 Sascha Silbe t-uboot@infra-silbe.de 2013-06-14T11:07:25+00:00 ff8fef566601ba27767e885386cb2074c4f09886 With CONFIG_SYS_64BIT_LBA, lbaint_t gets defined as a 64-bit type, which is required to represent block numbers for storage devices that exceed 2TiB (the block size usually is 512B), e.g. recent hard drives. For some obscure reason, the current U-Boot code uses lbaint_t for the number of blocks to read (a rather optimistic estimation of how RAM sizes will evolve), but not for the starting address. Trying to access blocks beyond the 2TiB boundary will simply wrap around and read a block within the 0..2TiB range. We now use lbaint_t for block start addresses, too. This required changes to all block drivers as the signature of block_read(), block_write() and block_erase() in block_dev_desc_t changed. Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de> 
With CONFIG_SYS_64BIT_LBA, lbaint_t gets defined as a 64-bit type,
which is required to represent block numbers for storage devices that
exceed 2TiB (the block size usually is 512B), e.g. recent hard drives.

For some obscure reason, the current U-Boot code uses lbaint_t for the
number of blocks to read (a rather optimistic estimation of how RAM
sizes will evolve), but not for the starting address. Trying to access
blocks beyond the 2TiB boundary will simply wrap around and read a
block within the 0..2TiB range.

We now use lbaint_t for block start addresses, too. This required
changes to all block drivers as the signature of block_read(),
block_write() and block_erase() in block_dev_desc_t changed.

Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
cros: adds cros_ec keyboard driver 2013-06-26T14:13:31+00:00 Hung-ying Tyan tyanh@chromium.org 2013-05-15T10:27:32+00:00 713cb68045c6e7fc32c79ab4e922fb3a7548fd2f This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> 
This patch adds the driver for keyboard that's controlled by ChromeOS EC.

Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
cros: add LPC support for cros_ec 2013-06-26T14:13:28+00:00 Hung-ying Tyan tyanh@chromium.org 2013-05-15T10:27:31+00:00 c8d3328a0a454f974b82380b9dc196e693edb7b1 This patch adds LPC support for carrying out the cros_ec protocol. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> 
This patch adds LPC support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
cros: exynos: add SPI support for cros_ec 2013-06-26T14:13:24+00:00 Hung-ying Tyan tyanh@chromium.org 2013-05-15T10:27:30+00:00 f3424c554c572761f35b00988deb8ed35d1870e3 This patch adds SPI support for carrying out the cros_ec protocol. Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> 
This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
cros: add I2C support for cros_ec 2013-06-26T14:12:24+00:00 Hung-ying Tyan tyanh@chromium.org 2013-05-15T10:27:29+00:00 78764a4e11dd40005ba2b36848de407070ccc1a7 This patch adds I2C support for carrying out the cros_ec protocol. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> 
This patch adds I2C support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
cros: add cros_ec driver 2013-06-26T14:07:11+00:00 Hung-ying Tyan tyanh@chromium.org 2013-05-15T10:27:28+00:00 88364387c60dc72549ccf7f2d595cbf847ab4e17 This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> 
This patch adds the cros_ec driver that implements the protocol for
communicating with Google's ChromeOS embedded controller.

Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>