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<title>u-boot.git/drivers, branch v2014.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>i2c: sh_i2c: bugfix: i2c probe command does not work</title>
<updated>2014-04-14T08:41:48+00:00</updated>
<author>
<name>Tetsuyuki Kobayashi</name>
<email>koba@kmckk.co.jp</email>
</author>
<published>2014-04-14T08:13:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a657689038982affa505b8ad402f17c8fdf10b3'/>
<id>7a657689038982affa505b8ad402f17c8fdf10b3</id>
<content type='text'>
This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework

Before commit 2035d77d, i2c probe command works properly on kzm9g board.

KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60

After commit 2035d77d, i2c probe command does not work.

KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F

sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does not read device at all. This patch prepares dummy buffer and read data into it.

Signed-off-by: Tetsuyuki Kobayashi &lt;koba@kmckk.co.jp&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
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<pre>
This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework

Before commit 2035d77d, i2c probe command works properly on kzm9g board.

KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60

After commit 2035d77d, i2c probe command does not work.

KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F

sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does not read device at all. This patch prepares dummy buffer and read data into it.

Signed-off-by: Tetsuyuki Kobayashi &lt;koba@kmckk.co.jp&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>Merge branch 'u-boot/master' into 'u-boot-arm/master'</title>
<updated>2014-04-08T07:25:08+00:00</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2014-04-08T07:25:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=519fdde9e6a6ebce7dc743b4f5621503d25b7a45'/>
<id>519fdde9e6a6ebce7dc743b4f5621503d25b7a45</id>
<content type='text'>
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/Makefile
	include/configs/trats.h
	include/configs/trats2.h
	include/mmc.h
</content>
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<pre>
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/Makefile
	include/configs/trats.h
	include/configs/trats2.h
	include/mmc.h
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-arm into master</title>
<updated>2014-04-04T09:35:30+00:00</updated>
<author>
<name>Stefano Babic</name>
<email>sbabic@denx.de</email>
</author>
<published>2014-04-04T09:35:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1cad23c5f471d695bed1e3907e30caee3c2a3056'/>
<id>1cad23c5f471d695bed1e3907e30caee3c2a3056</id>
<content type='text'>
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
	arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg

Signed-off-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
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<pre>
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
	arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg

Signed-off-by: Stefano Babic &lt;sbabic@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ahci: Fix data abort on multiple scsi resets.</title>
<updated>2014-04-02T19:44:40+00:00</updated>
<author>
<name>Roger Quadros</name>
<email>rogerq@ti.com</email>
</author>
<published>2014-04-01T14:26:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3f62971162370213271dc1e7a396b6b3a6d5b6c6'/>
<id>3f62971162370213271dc1e7a396b6b3a6d5b6c6</id>
<content type='text'>
Commit 2faf5fb82ed6 introduced a regression that causes a data
abort when running scsi init followed by scsi reset.

There are 2 problems with the original commit
1) ALLOC_CACHE_ALIGN_BUFFER() allocates memory on the stack but is
assigned to ataid[port] and used by other functions.
2) The function ata_scsiop_inquiry() tries to free memory which was
never allocated on the heap.

Fix these problems by using tmpid as a temporary cache aligned buffer.
Allocate memory separately for ataid[port] and re-use it if required.

Fixes: 2faf5fb82ed6 (ahci: Fix cache align error messages)

Reported-by: Eli Nidam &lt;elini@marvell.com&gt;
Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
</content>
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<pre>
Commit 2faf5fb82ed6 introduced a regression that causes a data
abort when running scsi init followed by scsi reset.

There are 2 problems with the original commit
1) ALLOC_CACHE_ALIGN_BUFFER() allocates memory on the stack but is
assigned to ataid[port] and used by other functions.
2) The function ata_scsiop_inquiry() tries to free memory which was
never allocated on the heap.

Fix these problems by using tmpid as a temporary cache aligned buffer.
Allocate memory separately for ataid[port] and re-use it if required.

Fixes: 2faf5fb82ed6 (ahci: Fix cache align error messages)

Reported-by: Eli Nidam &lt;elini@marvell.com&gt;
Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc:eSDHC: Workaround for data timeout issue on Txxx SoC</title>
<updated>2014-04-02T10:25:01+00:00</updated>
<author>
<name>Haijun.Zhang</name>
<email>Haijun.Zhang@freescale.com</email>
</author>
<published>2014-03-18T09:04:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1336e2d343f088b71ec71907855caccd1053d166'/>
<id>1336e2d343f088b71ec71907855caccd1053d166</id>
<content type='text'>
1. The Data timeout counter value in eSDHC_SYSCTL register is
not working as it should be, so add quirks to enable this
workaround to fix it to the max value 0xE.

2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.

* Update of patch for change mmc interface by
	Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;

Signed-off-by: Haijun Zhang &lt;Haijun.Zhang@freescale.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</content>
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<pre>
1. The Data timeout counter value in eSDHC_SYSCTL register is
not working as it should be, so add quirks to enable this
workaround to fix it to the max value 0xE.

2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.

* Update of patch for change mmc interface by
	Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;

Signed-off-by: Haijun Zhang &lt;Haijun.Zhang@freescale.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: add controller reset in case of data related errors too</title>
<updated>2014-04-02T10:17:12+00:00</updated>
<author>
<name>Andrew Gabbasov</name>
<email>andrew_gabbasov@mentor.com</email>
</author>
<published>2014-03-24T07:41:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8a573022c38da9ecc749acbc60556a8e8bd41996'/>
<id>8a573022c38da9ecc749acbc60556a8e8bd41996</id>
<content type='text'>
The controller reset is performed now if command error occurs.
This commit adds the reset for the case of data related errors too.

Signed-off-by: Andrew Gabbasov &lt;andrew_gabbasov@mentor.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</content>
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<pre>
The controller reset is performed now if command error occurs.
This commit adds the reset for the case of data related errors too.

Signed-off-by: Andrew Gabbasov &lt;andrew_gabbasov@mentor.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: fix calculation of timeout for data transactions</title>
<updated>2014-04-02T10:16:56+00:00</updated>
<author>
<name>Andrew Gabbasov</name>
<email>andrew_gabbasov@mentor.com</email>
</author>
<published>2014-03-24T07:40:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fb823981c550f873270666ce0f6117dbb956c214'/>
<id>fb823981c550f873270666ce0f6117dbb956c214</id>
<content type='text'>
Calculation of the timeout value should be based on actual clock value,
written to controller registers. Since mmc-&gt;tran_speed is either the
maximum allowed speed, or the preliminary value, that is be not yet
set to registers, the actual timeout, taken by the controller, based
on its clock settings, may be much longer than expected, based on
mmc-&gt;tran_speed value. In particular it happens at early initialization
stage, when typical value of mmc-&gt;tran_speed is 20MHz or 26MHz, while
actual clock setting, configured in the controller, is 400kHz.
It's more correct to use mmc-&gt;clock value for timeout calculation instead.

Signed-off-by: Andrew Gabbasov &lt;andrew_gabbasov@mentor.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</content>
<content type='xhtml'>
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<pre>
Calculation of the timeout value should be based on actual clock value,
written to controller registers. Since mmc-&gt;tran_speed is either the
maximum allowed speed, or the preliminary value, that is be not yet
set to registers, the actual timeout, taken by the controller, based
on its clock settings, may be much longer than expected, based on
mmc-&gt;tran_speed value. In particular it happens at early initialization
stage, when typical value of mmc-&gt;tran_speed is 20MHz or 26MHz, while
actual clock setting, configured in the controller, is 400kHz.
It's more correct to use mmc-&gt;clock value for timeout calculation instead.

Signed-off-by: Andrew Gabbasov &lt;andrew_gabbasov@mentor.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: Add 'mmc rst-function' sub-command</title>
<updated>2014-04-02T10:02:58+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-02-07T19:15:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=33ace362fdf80e2e2ea4cdf2829a5179c52de3f4'/>
<id>33ace362fdf80e2e2ea4cdf2829a5179c52de3f4</id>
<content type='text'>
Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value
in order for warm reset of the system to work.  Details on this being
required will be part of the eMMC datasheet.  Also add using this
command to the dra7xx README.

* Whitespace fix by panto

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value
in order for warm reset of the system to work.  Details on this being
required will be part of the eMMC datasheet.  Also add using this
command to the dra7xx README.

* Whitespace fix by panto

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: sh_mmcif: Fix warning by unused variable</title>
<updated>2014-04-02T09:55:48+00:00</updated>
<author>
<name>Nobuhiro Iwamatsu</name>
<email>nobuhiro.iwamatsu.yj@renesas.com</email>
</author>
<published>2014-03-31T05:54:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=74c32ef58dbcc204af03f5d7188b5cea3959974c'/>
<id>74c32ef58dbcc204af03f5d7188b5cea3959974c</id>
<content type='text'>
Signed-off-by: Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;
Reported-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</content>
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<pre>
Signed-off-by: Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;
Reported-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mmc: sh_mmcif: Fix compile error</title>
<updated>2014-04-02T09:55:31+00:00</updated>
<author>
<name>Nobuhiro Iwamatsu</name>
<email>nobuhiro.iwamatsu.yj@renesas.com</email>
</author>
<published>2014-03-31T05:54:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cd2bf4846c36a225bfffdedda50e5e80c8b2857f'/>
<id>cd2bf4846c36a225bfffdedda50e5e80c8b2857f</id>
<content type='text'>
BY commit "mmc: Split mmc struct, rework mmc initialization (v2)",
sh_mmcif has compile error. This fixes compile error.

Signed-off-by: Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;
CC: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
Reported-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
BY commit "mmc: Split mmc struct, rework mmc initialization (v2)",
sh_mmcif has compile error. This fixes compile error.

Signed-off-by: Nobuhiro Iwamatsu &lt;nobuhiro.iwamatsu.yj@renesas.com&gt;
CC: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
Reported-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
</pre>
</div>
</content>
</entry>
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