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<title>u-boot.git/drivers, branch v2018.09-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>tpm: sandbox: fix wrong assignment with a simplification</title>
<updated>2018-08-13T18:04:04+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2018-08-05T16:53:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=46703cd9f383ea4175d1f231651f9edcfa51a423'/>
<id>46703cd9f383ea4175d1f231651f9edcfa51a423</id>
<content type='text'>
The recv variable in sandbox_tpm2_fill_buf() is a pointer on a pointer
of a char array. It means accessing *recv is the char array pointer
itself while **recv is the first character of that array. There is no
need for such indirection here, so simplify the code.

Simplifying things will make the last assignment right: "*recv = NULL"
is now correct. The issue has been found by the following Coverity
Scan report:

    CID 183371:  Incorrect expression  (UNUSED_VALUE)
    Assigning value "4UL" to "*recv" here, but that stored value is overwritten before it can be used.
    232             *recv += sizeof(rc);
    233
    234             /* Add trailing \0 */
    235             *recv = NULL;

While at simplifying things, use '\0' instead of NULL when adding an
empty char at the end of the buffer.

Reported-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
The recv variable in sandbox_tpm2_fill_buf() is a pointer on a pointer
of a char array. It means accessing *recv is the char array pointer
itself while **recv is the first character of that array. There is no
need for such indirection here, so simplify the code.

Simplifying things will make the last assignment right: "*recv = NULL"
is now correct. The issue has been found by the following Coverity
Scan report:

    CID 183371:  Incorrect expression  (UNUSED_VALUE)
    Assigning value "4UL" to "*recv" here, but that stored value is overwritten before it can be used.
    232             *recv += sizeof(rc);
    233
    234             /* Add trailing \0 */
    235             *recv = NULL;

While at simplifying things, use '\0' instead of NULL when adding an
empty char at the end of the buffer.

Reported-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tpm: sandbox: fix wrong check on pcr_map</title>
<updated>2018-08-13T18:04:04+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2018-08-05T16:53:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fd973ca6969e556bfeb74e69c5a6867785c9ea5c'/>
<id>fd973ca6969e556bfeb74e69c5a6867785c9ea5c</id>
<content type='text'>
The second check on pcr_map in sandbox_tpm2_xfer() is wrong. It should
check for pcr_map not being empty. Instead, it is a pure copy/paste of
the first check which is redundant.

This has been found thanks to a Coverity Scan report:

    CID 183370:  Memory - illegal accesses  (UNINIT)
    Using uninitialized value "pcr_index".
        put_unaligned_be32(tpm-&gt;pcr_extensions[pcr_index], recv);

This is because pcr_index is initialized only if the user input is
correct, ie. at least one valid bit is set in pcr_map.

Fix the second check and also initialize pcr_index to 0 (which is
harmless in case of error) to make Coverity Scan happy.

Reported-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The second check on pcr_map in sandbox_tpm2_xfer() is wrong. It should
check for pcr_map not being empty. Instead, it is a pure copy/paste of
the first check which is redundant.

This has been found thanks to a Coverity Scan report:

    CID 183370:  Memory - illegal accesses  (UNINIT)
    Using uninitialized value "pcr_index".
        put_unaligned_be32(tpm-&gt;pcr_extensions[pcr_index], recv);

This is because pcr_index is initialized only if the user input is
correct, ie. at least one valid bit is set in pcr_map.

Fix the second check and also initialize pcr_index to 0 (which is
harmless in case of error) to make Coverity Scan happy.

Reported-by: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: at91: utmi: add timeout for utmi lock</title>
<updated>2018-08-13T18:03:57+00:00</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@microchip.com</email>
</author>
<published>2018-08-03T09:10:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e9cd3d70244a4a262c6b1935df87c85d25df5344'/>
<id>e9cd3d70244a4a262c6b1935df87c85d25df5344</id>
<content type='text'>
In case the slow clock is not properly configured, the UTMI clock
cannot lock the PLL, because UPLLCOUNT will "wait X slow clock cycles".
In this case U-boot will loop indefinitely.
Added a timeout in this case, to start U-boot even if UTMI clock is
not enabled, so the user can use different media if needed, or investigate.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</content>
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<pre>
In case the slow clock is not properly configured, the UTMI clock
cannot lock the PLL, because UPLLCOUNT will "wait X slow clock cycles".
In this case U-boot will loop indefinitely.
Added a timeout in this case, to start U-boot even if UTMI clock is
not enabled, so the user can use different media if needed, or investigate.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2018-08-13T16:34:55+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-08-13T16:34:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b8a1f47be3ab050090cd8625e580cf3c63e3ff53'/>
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</entry>
<entry>
<title>Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging</title>
<updated>2018-08-11T23:49:29+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-08-11T23:49:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8fee226da36f799e69041b2ab381064693199c7f'/>
<id>8fee226da36f799e69041b2ab381064693199c7f</id>
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<pre>
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</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-video</title>
<updated>2018-08-11T23:48:13+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-08-11T23:48:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=282ce6454c45409805e2c470bbec170d21a4bd35'/>
<id>282ce6454c45409805e2c470bbec170d21a4bd35</id>
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</entry>
<entry>
<title>misc: Add gdsys_ioep driver</title>
<updated>2018-08-11T14:00:50+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-07-31T12:24:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7e86242b2bdb2983423a3a1f3ec375df56c7cac8'/>
<id>7e86242b2bdb2983423a3a1f3ec375df56c7cac8</id>
<content type='text'>
Add driver for the IHS IO endpoint on IHS FPGAs.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
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<pre>
Add driver for the IHS IO endpoint on IHS FPGAs.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>test: Add tests for misc uclass</title>
<updated>2018-08-11T14:00:38+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-07-31T12:24:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=004e67c21634d0184eb0b874cbd05d834cb79067'/>
<id>004e67c21634d0184eb0b874cbd05d834cb79067</id>
<content type='text'>
Add a set of tests for the misc uclass.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Add a set of tests for the misc uclass.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: uclass: Add enable/disable function</title>
<updated>2018-08-11T14:00:19+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-07-31T12:24:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=440bc11f2e10dd80c7f5e717bc52daff73091bd5'/>
<id>440bc11f2e10dd80c7f5e717bc52daff73091bd5</id>
<content type='text'>
Add generic enable/disable function to the misc uclass.

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
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<pre>
Add generic enable/disable function to the misc uclass.

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>video_display: Add Xilinx LogiCore DP TX</title>
<updated>2018-08-11T07:18:44+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-08-09T12:51:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=25a9f9747a84b36f61f575d592eddc96bce5dabb'/>
<id>25a9f9747a84b36f61f575d592eddc96bce5dabb</id>
<content type='text'>
Add a driver for the Xilinx LogiCORE DisplayPort IP core, which is a
pure DP transmitter core for Xiling FPGA (no display capabilities).

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
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<pre>
Add a driver for the Xilinx LogiCORE DisplayPort IP core, which is a
pure DP transmitter core for Xiling FPGA (no display capabilities).

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
</div>
</content>
</entry>
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