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<title>u-boot.git/drivers, branch v2019.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>NET: DW: fix regression for ARC boards</title>
<updated>2019-10-07T17:23:49+00:00</updated>
<author>
<name>Eugeniy Paltsev</name>
<email>Eugeniy.Paltsev@synopsys.com</email>
</author>
<published>2019-10-07T16:10:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2a7232371ab27e13f9d131a25111e951c3c729dd'/>
<id>2a7232371ab27e13f9d131a25111e951c3c729dd</id>
<content type='text'>
The commit
642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.

Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.

Signed-off-by: Eugeniy Paltsev &lt;Eugeniy.Paltsev@synopsys.com&gt;
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<pre>
The commit
642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.

Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.

Signed-off-by: Eugeniy Paltsev &lt;Eugeniy.Paltsev@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: core: Correct bad cast in ofnode_get_addr_size_index()</title>
<updated>2019-10-03T13:10:53+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-09-25T14:55:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e18c41fca46a33bf76b4664796e3e132dc71c6cb'/>
<id>e18c41fca46a33bf76b4664796e3e132dc71c6cb</id>
<content type='text'>
At present this code passes an fdt_addr_t pointer as a u64 pointer which
is not safe, since sizeof(fdt_addr_t) may be 4, e.g. with sandbox. Correct
this to avoid a stack corruption problem.

Fixes: e679d03b08 (core: ofnode: Add ofnode_get_addr_size_index)
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
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<pre>
At present this code passes an fdt_addr_t pointer as a u64 pointer which
is not safe, since sizeof(fdt_addr_t) may be 4, e.g. with sandbox. Correct
this to avoid a stack corruption problem.

Fixes: e679d03b08 (core: ofnode: Add ofnode_get_addr_size_index)
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: core: Correct low cell in ofnode_read_pci_addr()</title>
<updated>2019-10-03T13:10:11+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-09-25T14:55:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e587886a6112e476a74a26e6cf7068a23723097c'/>
<id>e587886a6112e476a74a26e6cf7068a23723097c</id>
<content type='text'>
This reads the low cell of the PCI address from the wrong cell. Fix it.
Also fix the function that this code came from.

Fixes: 9e51204527 (dm: core: Add operations on device tree references)
Fixes: 4ea5243a3a (fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT)
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
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<pre>
This reads the low cell of the PCI address from the wrong cell. Fix it.
Also fix the function that this code came from.

Fixes: 9e51204527 (dm: core: Add operations on device tree references)
Fixes: 4ea5243a3a (fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT)
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Merge tag 'fixes-for-2019.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-video.git</title>
<updated>2019-09-22T20:39:01+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-09-22T20:39:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=780a17e814503f71d1b51d578b32bc9c89933183'/>
<id>780a17e814503f71d1b51d578b32bc9c89933183</id>
<content type='text'>
- fix sunxi LCD clock divider
- fix splash logo with DM_VIDEO and CONFIG_VIDEO_LOGO
- fix splash banner output with DM_VIDEO
</content>
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<pre>
- fix sunxi LCD clock divider
- fix splash logo with DM_VIDEO and CONFIG_VIDEO_LOGO
- fix splash banner output with DM_VIDEO
</pre>
</div>
</content>
</entry>
<entry>
<title>sunxi: video: HDMI: Fix LCD clock divider</title>
<updated>2019-09-21T08:52:57+00:00</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2019-08-09T20:30:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f34e7fc29b32066a8af6c4d22a1f6e0fbfd8e6db'/>
<id>f34e7fc29b32066a8af6c4d22a1f6e0fbfd8e6db</id>
<content type='text'>
Currently we may end up with an LCD clock divider that differs from
the HDMI PHY clock divider if we can't exactly match the pixel clock.
Fix this by using DIV_ROUND_UP to calculate the divider.  This works
since the PLL is chosen such that the resulting pixel clock is
never higher than the requested pixel clock.

Fixes: 1feed358ed15 ("sunxi: video: HDMI: Fix clock setup")

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
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<pre>
Currently we may end up with an LCD clock divider that differs from
the HDMI PHY clock divider if we can't exactly match the pixel clock.
Fix this by using DIV_ROUND_UP to calculate the divider.  This works
since the PLL is chosen such that the resulting pixel clock is
never higher than the requested pixel clock.

Fixes: 1feed358ed15 ("sunxi: video: HDMI: Fix clock setup")

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-rockchip-20190920' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip</title>
<updated>2019-09-20T21:43:33+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-09-20T21:43:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d6c7309f561ac832c080e5ec07b0af9c8da319a8'/>
<id>d6c7309f561ac832c080e5ec07b0af9c8da319a8</id>
<content type='text'>
- Fix rk3288 tinker and evb SPL boot fail
- Enable get sn from cpuid for rk3399 rockpro64 board
</content>
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<pre>
- Fix rk3288 tinker and evb SPL boot fail
- Enable get sn from cpuid for rk3399 rockpro64 board
</pre>
</div>
</content>
</entry>
<entry>
<title>watchdog: omap_wdt: Fix WDT target reset when booted from emmc</title>
<updated>2019-09-19T16:54:29+00:00</updated>
<author>
<name>Suniel Mahesh</name>
<email>sunil.m@techveda.org</email>
</author>
<published>2019-09-16T08:09:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1e3966394a96fbf6128a875d135e074656d1bd64'/>
<id>1e3966394a96fbf6128a875d135e074656d1bd64</id>
<content type='text'>
AM335X based beaglebone black target gets reset by DM converted watchdog
if booted from emmc around 60sec. Fixed this by moving driver's private struct
variable initialization at different places in the driver to driver's probe.
Tested on Beaglebone Black.

Cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Fixes: 7659ea32 ("watchdog: omap_wdt: Convert watchdog driver to use DT and DM")
Reported-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Signed-off-by: Suniel Mahesh &lt;sunil.m@techveda.org&gt;
Acked-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Reviewed-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
</content>
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<pre>
AM335X based beaglebone black target gets reset by DM converted watchdog
if booted from emmc around 60sec. Fixed this by moving driver's private struct
variable initialization at different places in the driver to driver's probe.
Tested on Beaglebone Black.

Cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Fixes: 7659ea32 ("watchdog: omap_wdt: Convert watchdog driver to use DT and DM")
Reported-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Signed-off-by: Suniel Mahesh &lt;sunil.m@techveda.org&gt;
Acked-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Reviewed-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtc: ds3231/ds3232: fix coding style</title>
<updated>2019-09-19T16:18:53+00:00</updated>
<author>
<name>Biwen Li</name>
<email>biwen.li@nxp.com</email>
</author>
<published>2019-08-27T07:32:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d64e01f367c90ec7791ec3982abe191fe82953c8'/>
<id>d64e01f367c90ec7791ec3982abe191fe82953c8</id>
<content type='text'>
The patch fixes coding style

Signed-off-by: Biwen Li &lt;biwen.li@nxp.com&gt;
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<pre>
The patch fixes coding style

Signed-off-by: Biwen Li &lt;biwen.li@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: rk3288: Initialize dram for TPL builds</title>
<updated>2019-09-19T01:35:31+00:00</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@amarulasolutions.com</email>
</author>
<published>2019-09-17T06:10:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4f24163efad8a886800a02da0dd787996d7adfa7'/>
<id>4f24163efad8a886800a02da0dd787996d7adfa7</id>
<content type='text'>
Few of the rk3288 boards like tinker, vyasa are using
TPL, SPL bootchain so the dram initialization must needed
during TPL stage. So add proper ifconstruct to satisfy
both TPL, SPL and SPL-only bootchain boards.

This eventually fixing TPL to SPL handoff, otherwise missing
dram initilaztion at TPL stage would leads to SPL hang.

Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Kever Yang&lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
Few of the rk3288 boards like tinker, vyasa are using
TPL, SPL bootchain so the dram initialization must needed
during TPL stage. So add proper ifconstruct to satisfy
both TPL, SPL and SPL-only bootchain boards.

This eventually fixing TPL to SPL handoff, otherwise missing
dram initilaztion at TPL stage would leads to SPL hang.

Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Kever Yang&lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq</title>
<updated>2019-09-16T17:13:45+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-09-16T17:13:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a9fa70b7b7167487affc5d919e541872c99e814b'/>
<id>a9fa70b7b7167487affc5d919e541872c99e814b</id>
<content type='text'>
- Add emmc hs200 support
- Few bug fixes related to serdes, I2C, ethernet, etc
</content>
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<pre>
- Add emmc hs200 support
- Few bug fixes related to serdes, I2C, ethernet, etc
</pre>
</div>
</content>
</entry>
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