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<title>u-boot.git/drivers, branch v2021.01-rc3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers?h=v2021.01-rc3</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers?h=v2021.01-rc3'/>
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<updated>2020-11-29T16:12:59Z</updated>
<entry>
<title>Merge tag 'mmc-2020-11-29' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc</title>
<updated>2020-11-29T16:12:59Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-11-29T16:12:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a7ab4b71d563b6e0b65f911a8bf7d6950625982e'/>
<id>urn:sha1:a7ab4b71d563b6e0b65f911a8bf7d6950625982e</id>
<content type='text'>
- mmc minor update for better debug and error check
- fsl_esdhc sysctl set and make sure delay check for HS400
</content>
</entry>
<entry>
<title>i2c: ocores: add i2c driver for OpenCores I2C controller</title>
<updated>2020-11-28T07:30:41Z</updated>
<author>
<name>Pragnesh Patel</name>
<email>pragnesh.patel@sifive.com</email>
</author>
<published>2020-11-14T09:12:34Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b2d4cbe6d47a7685c66517edd265a78dfc8b9c98'/>
<id>urn:sha1:b2d4cbe6d47a7685c66517edd265a78dfc8b9c98</id>
<content type='text'>
Add support for the OpenCores I2C controller IP core
(See http://www.opencores.org/projects.cgi/web/i2c/overview).

This driver implementation is inspired from the Linux OpenCores
I2C driver available.

Thanks to Peter Korsgaard &lt;peter@korsgaard.com&gt; for writing Linux
OpenCores I2C driver.

Signed-off-by: Pragnesh Patel &lt;pragnesh.patel@sifive.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
</entry>
<entry>
<title>i2c: designware_i2c: Don't warn if no reset controller</title>
<updated>2020-11-28T07:30:41Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-11-09T14:12:49Z</published>
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<id>urn:sha1:942012246a7a1dea66869be7763d73f0565bdb7b</id>
<content type='text'>
At present if CONFIG_RESET is not enabled, this code shows a warning:

  designware_i2c_ofdata_to_platdata() i2c_designware_pci i2c2@16,0:
	Can't get reset: -524

Avoid this by checking if reset is supported, first.

Fixes: 622597dee4f ("i2c: designware: add reset ctrl to driver")
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>i2c: mvtwsi: disable i2c slave also on Armada 8k</title>
<updated>2020-11-28T07:17:16Z</updated>
<author>
<name>Baruch Siach</name>
<email>baruch@tkos.co.il</email>
</author>
<published>2020-10-01T11:49:02Z</published>
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<id>urn:sha1:5a13c0d1348284b7f2a2c9b463ceedac67166d07</id>
<content type='text'>
The hidden I2C slave is also present on the Armada 8k AP806. Testing
shows that this I2C slave causes the same issues as Armada 38x.
Disabling that I2C slave fixes all these issues.

I2C blocks on the Armada 8k CP110 are not affected.

Extend the I2C slave disable to Armada 8k as well.

Cc: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
</content>
</entry>
<entry>
<title>mmc: check a return value about regulator's always-on</title>
<updated>2020-11-28T02:44:39Z</updated>
<author>
<name>Jaehoon Chung</name>
<email>jh80.chung@samsung.com</email>
</author>
<published>2020-11-06T11:30:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b3dc016caade00e07d5ae45042c9be42f611d625'/>
<id>urn:sha1:b3dc016caade00e07d5ae45042c9be42f611d625</id>
<content type='text'>
Regulator can be set to "always-on".
It's not error about enable/disable. It needs to check about
its condition.

Signed-off-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: display an error number to debug</title>
<updated>2020-11-28T02:43:42Z</updated>
<author>
<name>Jaehoon Chung</name>
<email>jh80.chung@samsung.com</email>
</author>
<published>2020-11-16T22:04:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=58896458b70673a1401b60ba415c0158ae9d08cf'/>
<id>urn:sha1:58896458b70673a1401b60ba415c0158ae9d08cf</id>
<content type='text'>
It's useful to know an error number when it's debugging.

Signed-off-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: make sure delay chain locked for HS400</title>
<updated>2020-11-28T02:39:44Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2020-10-20T03:04:52Z</published>
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<id>urn:sha1:8ee802f899efb422cbd5dc51a734d735320e9999</id>
<content type='text'>
For eMMC HS400 mode, the DLL reset is a required step for mmc rescan.
This step has not been documented in reference manual, but the RM will
be fixed sooner or later.

In previous commit to support eMMC HS400,
  db8f936 mmc: fsl_esdhc: support eMMC HS400 mode

the steps to configure DLL could be found in commit message,
  13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
  14. Wait for delay chain to lock.

these would be fixed as,
  13.   Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
  13.1  Write DLLCFG0[DLL_RESET] to 1 and wait for 1us,
        then write DLLCFG0[DLL_RESET]
  14.   Wait for delay chain to lock.

This patch is to add the step of DLL reset, and make sure delay chain
locked for HS400.

Fixes: db8f93672b42 ("mmc: fsl_esdhc: support eMMC HS400 mode")
Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: set sysctl register for clock initialization</title>
<updated>2020-11-28T02:39:44Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2020-10-20T03:04:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=263ddfc3454ead3a988adef39b962479adce2b28'/>
<id>urn:sha1:263ddfc3454ead3a988adef39b962479adce2b28</id>
<content type='text'>
The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
<entry>
<title>mmc: Add some helper functions for retrying on error</title>
<updated>2020-11-28T02:39:44Z</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-10-17T12:36:27Z</published>
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<id>urn:sha1:da129170600e33bdcea1762ebe4ea0a2c9312a9e</id>
<content type='text'>
All of the existing quirks add retries to various calls of mmc_send_cmd.
mmc_send_cmd_quirks is a helper function to do this retrying behavior. It
checks if quirks mode is enabled, and if a specific quirk is activated it
retries on error.

This also adds mmc_send_cmd_retry, which retries on error every time
(instead of if a quirk is activated).

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
<entry>
<title>phy: stm32: usbphyc: manage optional vbus regulator on phy_power_on/off</title>
<updated>2020-11-25T11:02:58Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2020-10-15T12:50:57Z</published>
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<id>urn:sha1:c4801389588c9ed49222e6f0615de9879d445f9c</id>
<content type='text'>
This patch adds support for optional vbus regulator.
It is managed on phy_power_on/off calls and may be needed for host mode.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
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