u-boot.git/drivers, branch v2022.10-rc4

Merge tag 'u-boot-rockchip-20220905' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

2022-09-05T02:35:40Z

- migrate to use binman for U-Boot image generate on rockchip platform; - Some fixes for rk3399 and rk3308;

clk: rockchip: rk3399: Fix Unknown clock 77 on mmc@fe310000

2022-09-04T12:00:39Z

Adding some debug prints I can see: MMC: mmc@fe320000: Got clock clock-controller@ff760000 76 mmc@fe310000: Got clock clock-controller@ff760000 77 Unknown clock 77 rockchip_dwmmc_get_mmc_clk: err=-2 mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0 According to kernel code the SDIO clock is identical to SDMMC clock except for the con 16->15 change. Add support for the clock to avoid the error. Signed-off-by: Michal Suchanek Reviewed-by: Kever Yang

ram: rk3399: Conduct memory training at 400MHz

2022-09-04T12:00:38Z

Currently the default initialisation frequency is 50MHz. Although this does appear to be suitable for some LPDDR4 RAM chips, training at this low frequency has been seen to cause Column errors, leading to Capacity check errors on others. Here we force RAM initialisation to happen at 400MHz before ramping up to the final value running value of 800MHz after everything has been successfully configured. Link: https://lore.kernel.org/u-boot/Yo4v3jUeHXTovjOH@google.com/ Suggested-by: YouMin Chen Signed-off-by: Lee Jones Tested-by: Xavier Drudis Ferran Reviewed-by: Kever Yang Tested-by: Michal Suchánek

ram: rk3399: Fix faulty frequency change reports

2022-09-04T12:00:38Z

Frequency changes to 400MHz are presently reported as: lpddr4_set_rate_0: change freq to 400000000 mhz 0, 1 This is obviously wrong by 6 orders of magnitude. Ensure frequency changes are reported accurately. Signed-off-by: Lee Jones Tested-by: Xavier Drudis Ferran Reviewed-by: Kever Yang

ram: rk3399: Fix .set_rate_index() error handling

2022-09-04T12:00:38Z

Functions pointed to by this op pointer can return non-zero values indicating an error. Ensure any error value is propagated back up the call-chain. Signed-off-by: Lee Jones Tested-by: Xavier Drudis Ferran Reviewed-by: Kever Yang

drivers: ram: rockchip: Fix dram channels calculation for rk3399

2022-09-04T12:00:38Z

Only add the dram channel when we finally setup it successfully at the last step. Signed-off-by: Han Pengfei Reviewed-by: Kever Yang

Merge tag 'tpm-03092022' of https://source.denx.de/u-boot/custodians/u-boot-tpm

2022-09-03T18:55:37Z

TPM fixes and state reporting

Merge https://source.denx.de/u-boot/custodians/u-boot-sh

2022-09-03T18:55:24Z

tpm: Implement state command for Cr50

2022-09-03T13:59:05Z

Add a vendor-specific TPM2 command for this and implement it for Cr50. Note: This is not part of the TPM spec, but is a Cr50 extension. Signed-off-by: Simon Glass Reviewed-by: Ilias Apalodimas Signed-off-by: Ilias Apalodimas

tpm: Allow reporting the internal state

2022-09-03T13:59:05Z

It is useful to read information about the current TPM state, where supported, e.g. for debugging purposes when verified boot fails. Add support for this to the TPM interface as well as Cr50. Add a simple sandbox test. Signed-off-by: Simon Glass Reviewed-by: Ilias Apalodimas Signed-off-by: Ilias Apalodimas