u-boot.git/drivers, branch v2024.01-rc3

scsi: set dma direction to NONE for TEST UNIT READY

2023-11-20T13:34:08+00:00

SCSI device scan code was executing TEST UNIT READY command without
explicitly setting dma direction in struct scsi_cmd to NONE, so command
was passed to driver with dma direction set to DMA_FROM_DEVICE,
inherited from older usage.

With WDC SDINDDH6-64G ufs device, that caused TEST UNIT READY to
return error.

Fix that, by explicitly setting dma direction to NONE for
TEST UNIT READY, and restoring it back DMA_FROM_DEVICE for the
following READ CAPACITY.

Signed-off-by: Nikita Yushchenko 
Reviewed-by: Marek Vasut

Merge branch 'master-mmc-clock' of https://source.denx.de/u-boot/custodians/u-boot-sh

2023-11-18T15:25:48+00:00

virtio: rng: gracefully handle 0 byte returns

2023-11-17T16:58:26+00:00

According to the virtio v1.x "entropy device" specification, a virtio-rng
device is supposed to always return at least one byte of entropy.
However the virtio v0.9 spec does not mention such a requirement.

The Arm Fixed Virtual Platform (FVP) implementation of virtio-rng always
returns 8 bytes less of entropy than requested. If 8 bytes or less are
requested, it will return 0 bytes.
This behaviour makes U-Boot's virtio_rng_read() implementation go into an
endless loop, hanging the system.

Work around this problem by always requesting 8 bytes more than needed,
but only if a previous call to virtqueue_get_buf() returned 0 bytes.

This should never trigger on a v1.x spec compliant implementation, but
fixes the hang on the Arm FVP.

Signed-off-by: Andre Przywara 
Reported-by: Peter Hoyes

dm: Do not enable debug messages by default

2023-11-15T03:04:01+00:00

CONFIG_DM_WARN has a text indicating that these messages should only
provided when debugging. This implies that the setting must be default no.

We should still create debug messages.

Reported-by: Andre Przywara 
Signed-off-by: Heinrich Schuchardt 
Reviewed-by: Simon Glass

mmc: renesas-sdhi: Disable clock after tuning reset when possible

2023-11-13T03:12:47+00:00

Currently the renesas_sdhi_reset_tuning() unconditionally leaves SDHI
clock enabled after the tuning reset. This is not always necessary.

After the driver performed tuning reset at the end of probe function,
or in the unlikely case that tuning failed during regular operation,
the SDHI clock can be disabled after the tuning reset. The following
set_ios call would reconfigure the clock as needed.

In case of regular set_ios call which requires a tuning reset, keep
the clock enabled or disabled according to the mmc->clk_disable state.

With this in place, the controllers which have not been accessed via
block subsystem after boot are left in quiescent state. However, if an
MMC device is used e.g. for environment storage, that controller would
be accessed during the environment load and left active, including its
clock which would still be generated. This is due to the design of the
MMC subsystem, which does not deinit a controller after it was started
once, the controller is only deinited in case of mmc rescan, or before
OS boot.

Signed-off-by: Marek Vasut 
Reviewed-by: Jaehoon Chung 
Reviewed-by: Paul Barker 
Tested-by: Paul Barker 
Reviewed-by: Yoshihiro Shimoda 
Tested-by: Thuan Nguyen Hong

power: regulator: add AXP313 support

2023-11-12T16:47:16+00:00

The X-Powers AXP313a is a small PMIC with just three buck converters and
three LDOs, one of which is actually fixed (so not modelled here).

Add the compatible string and the respective regulator ranges to allow
drivers to adjust voltages.

Signed-off-by: Andre Przywara 
Reviewed-by: Jaehoon Chung

power: pmic: sunxi: add AXP313 SPL driver

2023-11-12T16:47:16+00:00

On boards using the AXP313 PMIC, the DRAM rail is often not setup
correctly at reset time, so we have to program the PMIC very early in
the SPL, before running the DRAM initialisation.

Add a simple AXP313 PMIC driver that knows about DCDC2(CPU) and
DCDC3(DRAM), so that we can bump up the voltage before the DRAM init.

Signed-off-by: Andre Przywara 
Acked-by: Jernej Skrabec

pinctrl: sunxi: Avoid using .bss for SPL

2023-11-12T16:46:46+00:00

sunxi platforms put .bss in DRAM, so .bss is not available in SPL before
DRAM controller initialization. Therefore, this buffer must be placed in
the .data section.

Signed-off-by: Samuel Holland 
Reviewed-by: Andre Przywara

sunxi: mmc: Sort compatible strings numerically

2023-11-12T16:46:32+00:00

commit 95168d77d391 ("sunxi: add Allwinner R528/T113 SoC support") added
the new entry out of order.

Signed-off-by: Samuel Holland 
Reviewed-by: Jaehoon Chung

clk: sunxi: Use the right symbol in the Makefile

2023-11-12T16:46:16+00:00

CONFIG_ARCH_SUNXI will not be enabled for RISC-V SoCs using this driver.
Use the symbol for the driver itself instead.

Signed-off-by: Samuel Holland 
Reviewed-by: Andre Przywara