<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers, branch v2025.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>acpi: Fix table length for QEMU</title>
<updated>2025-04-03T06:58:27+00:00</updated>
<author>
<name>Ilias Apalodimas</name>
<email>ilias.apalodimas@linaro.org</email>
</author>
<published>2025-04-03T05:34:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=37a33d326e104ad725bcf127d3ffc59a5f9d58e6'/>
<id>37a33d326e104ad725bcf127d3ffc59a5f9d58e6</id>
<content type='text'>
The end of the ACPI table is set to 'addr' instead of 'end'. The ACPI
code for QEMU relies on those values to mark memory as 'ACPI Reclaim'
and as a result the ACPI RSDP ends up in Boot services Data.

Reported-by: Björn Töpel &lt;bjorn@kernel.org&gt;
Fixes: commit 638cc363484b ("acpi: enable writing ACPI tables on QEMU")
Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Reviewed-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
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<pre>
The end of the ACPI table is set to 'addr' instead of 'end'. The ACPI
code for QEMU relies on those values to mark memory as 'ACPI Reclaim'
and as a result the ACPI RSDP ends up in Boot services Data.

Reported-by: Björn Töpel &lt;bjorn@kernel.org&gt;
Fixes: commit 638cc363484b ("acpi: enable writing ACPI tables on QEMU")
Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Reviewed-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sophgo: Fix return values of register updating helpers</title>
<updated>2025-03-25T04:13:42+00:00</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-03-07T17:11:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=02933626c7351db6f38cd72d85b47188655fbc85'/>
<id>02933626c7351db6f38cd72d85b47188655fbc85</id>
<content type='text'>
These helpers wrongly return the updated register value. As a non-zero
value indicates failure, this causes various clock operations are
considered failed.

Correct the return value to constant zero, since these simple MMIO
operations won't fail. This fixes clock enabling failures during booting
process,

	In:    serial@4140000
	Out:   serial@4140000
	Err:   serial@4140000
	Net:   Enable clock-controller@3002000 failed
	failed to enable clock 0
	No ethernet found.

which leads to misoperation of various peripherals.

Fixes: 5f364e072e7 ("clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC")
Tested-by: Yuguo Pei &lt;purofle@gmail.com&gt;
Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
</content>
<content type='xhtml'>
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<pre>
These helpers wrongly return the updated register value. As a non-zero
value indicates failure, this causes various clock operations are
considered failed.

Correct the return value to constant zero, since these simple MMIO
operations won't fail. This fixes clock enabling failures during booting
process,

	In:    serial@4140000
	Out:   serial@4140000
	Err:   serial@4140000
	Net:   Enable clock-controller@3002000 failed
	failed to enable clock 0
	No ethernet found.

which leads to misoperation of various peripherals.

Fixes: 5f364e072e7 ("clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC")
Tested-by: Yuguo Pei &lt;purofle@gmail.com&gt;
Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>usb: dwc3: gadget: Fix match_ep callback for NXP UUU tool</title>
<updated>2025-03-21T08:37:40+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2025-03-19T22:07:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0916053ebc566245b06d0a179533f6622b6ad392'/>
<id>0916053ebc566245b06d0a179533f6622b6ad392</id>
<content type='text'>
The UUU tool excepts the interrupt-in endpoint to be ep1in, otherwise
it crashes. This is a result of the previous hard-coded EP setup in
drivers/usb/gadget/epautoconf.c which did special-case EP allocation
for SPL builds, and which was since converted to this callback, but
without the special-case EP allocation in SPL part.

This reinstates the SPL part in an isolated manner, only for NXP iMX
SoCs, only for SPL builds, and only for the ep1in interrupt-in endpoint.

Fixes: 1918b8010c32 ("usb: dwc3: gadget: Convert epautoconf workaround to match_ep callback")
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
Link: https://lore.kernel.org/r/20250319220805.219001-1-marex@denx.de
Signed-off-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The UUU tool excepts the interrupt-in endpoint to be ep1in, otherwise
it crashes. This is a result of the previous hard-coded EP setup in
drivers/usb/gadget/epautoconf.c which did special-case EP allocation
for SPL builds, and which was since converted to this callback, but
without the special-case EP allocation in SPL part.

This reinstates the SPL part in an isolated manner, only for NXP iMX
SoCs, only for SPL builds, and only for the ep1in interrupt-in endpoint.

Fixes: 1918b8010c32 ("usb: dwc3: gadget: Convert epautoconf workaround to match_ep callback")
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
Link: https://lore.kernel.org/r/20250319220805.219001-1-marex@denx.de
Signed-off-by: Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: renesas: dbsc5: Make struct renesas_dbsc5_board_config public</title>
<updated>2025-03-16T13:56:16+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-03-16T13:51:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=885fd621a309a2c3f8e8d41bdc8ff893221dc478'/>
<id>885fd621a309a2c3f8e8d41bdc8ff893221dc478</id>
<content type='text'>
Make struct renesas_dbsc5_board_config {} definition public via
include/dbsc5.h, so this structure can be defined in board files
and passed into the DBSC5 DRAM driver by overriding weak function
dbsc5_get_board_data() on board level.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Make struct renesas_dbsc5_board_config {} definition public via
include/dbsc5.h, so this structure can be defined in board files
and passed into the DBSC5 DRAM driver by overriding weak function
dbsc5_get_board_data() on board level.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: renesas: dbsc5: Add V4H-3/V4H-5/V4H-7 OTP based detection</title>
<updated>2025-03-16T13:56:16+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-03-16T13:51:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=74e28113618f362d2f8ee2edd874fd1789efceb7'/>
<id>74e28113618f362d2f8ee2edd874fd1789efceb7</id>
<content type='text'>
Add auto-detection and handling of Renesas R-Car V4H-3 and V4H-5
in addition to V4H-7 SoC variants based on OTP fuse programming.
The V4H-3 and V4H-5 variants have reduced DRAM frequency options.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add auto-detection and handling of Renesas R-Car V4H-3 and V4H-5
in addition to V4H-7 SoC variants based on OTP fuse programming.
The V4H-3 and V4H-5 variants have reduced DRAM frequency options.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: renesas: dbsc5: Synchronize initialization code to rev.1.10</title>
<updated>2025-03-16T13:56:16+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-03-16T13:51:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9ae94d2aedbbd38dc681f89b82f8ce4f2c3ee387'/>
<id>9ae94d2aedbbd38dc681f89b82f8ce4f2c3ee387</id>
<content type='text'>
Update the DRAM initialization code to match DBSC5 initialization code
rev.1.10 , which is currently the latest version available. This makes
DRAM initialization operational on Renesas R-Car V4H R8A779G0 rev.3.0.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update the DRAM initialization code to match DBSC5 initialization code
rev.1.10 , which is currently the latest version available. This makes
DRAM initialization operational on Renesas R-Car V4H R8A779G0 rev.3.0.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: renesas: dbsc5: Fix DBTR11 calculation</title>
<updated>2025-03-16T13:56:16+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-03-16T13:51:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da7662f6bb02806690dac6b25a6e582ed21254d0'/>
<id>da7662f6bb02806690dac6b25a6e582ed21254d0</id>
<content type='text'>
Reinstate missing increment by two in DBTR11 calculation based
on the original DBSC5 initialization code rev.0.80. The original
code did ... ODTLon - (js2[JS2_tODTon_min] - 1) + 1 , which was
incorrectly converted into ODTLon - js2[JS2_tODTon_min], but
should have been converted to ODTLon - js2[JS2_tODTon_min] + 2.
Add the missing +2 .

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reinstate missing increment by two in DBTR11 calculation based
on the original DBSC5 initialization code rev.0.80. The original
code did ... ODTLon - (js2[JS2_tODTon_min] - 1) + 1 , which was
incorrectly converted into ODTLon - js2[JS2_tODTon_min], but
should have been converted to ODTLon - js2[JS2_tODTon_min] + 2.
Add the missing +2 .

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: renesas: dbsc5: Fix JS1 index calculation</title>
<updated>2025-03-16T13:56:16+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-03-16T13:51:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9a106f15fac20790c272023845ec10e46281bef2'/>
<id>9a106f15fac20790c272023845ec10e46281bef2</id>
<content type='text'>
The JS1 index is calculated correctly, but the limiter cannot
be the max() function because the index should be lower than
JS1_USABLEC_SPEC_HI and the max() function would unconditionally
override the JS1 index to JS1_USABLEC_SPEC_HI. Use clamp() to
limit the JS1 index instead.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The JS1 index is calculated correctly, but the limiter cannot
be the max() function because the index should be lower than
JS1_USABLEC_SPEC_HI and the max() function would unconditionally
override the JS1 index to JS1_USABLEC_SPEC_HI. Use clamp() to
limit the JS1 index instead.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ram: renesas: dbsc5: Fix bitrate MD pin parsing</title>
<updated>2025-03-16T13:56:16+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-03-16T13:51:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6c219e184f9efffed88dbd82dac94c24ebb00347'/>
<id>6c219e184f9efffed88dbd82dac94c24ebb00347</id>
<content type='text'>
Fix copy paste error in MD pin handling for 5500 Mbps and 4800 Mbps case,
each should be handled by MD[19,17] == 2 and MD[19,17] == 3 respectively.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix copy paste error in MD pin handling for 5500 Mbps and 4800 Mbps case,
each should be handled by MD[19,17] == 2 and MD[19,17] == 3 respectively.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2025.04-rc4' of https://source.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2025-03-05T18:11:18+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-03-05T18:11:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=367971d20594572bc31c0195fdf67611ead94e08'/>
<id>367971d20594572bc31c0195fdf67611ead94e08</id>
<content type='text'>
AMD/Xilinx changes for v2025.04-rc4

Zynq:
- Guard code around SPL_FS_LOAD_PAYLOAD_NAME

Versal*:
- Remove tftp block size 4096

Versal:
- Use clocks per DT binding
- Store driver data in data section

Versal Gen 2:
- Fix major/minor version decoding
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
AMD/Xilinx changes for v2025.04-rc4

Zynq:
- Guard code around SPL_FS_LOAD_PAYLOAD_NAME

Versal*:
- Remove tftp block size 4096

Versal:
- Use clocks per DT binding
- Store driver data in data section

Versal Gen 2:
- Fix major/minor version decoding
</pre>
</div>
</content>
</entry>
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