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<title>u-boot.git/drivers, branch v2025.04-rc3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2025-02-24T20:16:28Z</updated>
<entry>
<title>mmc: Fix size calculation for sector addressed MMC version 4</title>
<updated>2025-02-24T20:16:28Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2025-01-29T11:15:54Z</published>
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<id>urn:sha1:dbb9e136b8c01de581a08113ae6124f484b29362</id>
<content type='text'>
For eMMC v4 and newer that is smaller than 2 GiB, the JEDEC JESD84-B51
section 6.2.4 Configure partitions indicates that EXT_CSD SEC_COUNT
should not be used to determine device size, and instead device size
should be calculated from C_SIZE and C_SIZE_MULT.

This is not exactly accurate, the 2 GiB limit is not a hard line,
there are eMMC devices which are smaller than 2 GiB and still
require device size to be determined from EXT_CSD SEC_COUNT. The
hard line is instead OCR HCS bit, which indicates whether the device
is byte or sector addressed, the former applies to most devices
below 2 GiB, and the later applies mostly to devices above 2 GiB.

However, there are a couple of devices which are smaller than 2 GiB
and still set the OCR HCS bit to indicate they are sector addressed,
and therefore the size calculation for those devices should also
use EXT_CSD SEC_COUNT . Use mmc-&gt;high_capacity flag to discern the
devices instead of arbitrary 2 GiB limit. The mmc-&gt;high_capacity flag
reflects the OCR HCS bit state.

Fixes: 639b7827d1ca ("mmc: fix the condition for MMC version 4")
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>net: dwc_eth_qos_rockchip: Fix disable of RX/TX delay for RK3588</title>
<updated>2025-02-19T15:26:11Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-02-09T23:27:56Z</published>
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<id>urn:sha1:8d25dbb725fd07ff43efc7cca80a56b04c48eb06</id>
<content type='text'>
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.

Change to disable RX and/or TX delay and using zero as delay value.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>net: dwc_eth_qos_rockchip: Fix disable of RX/TX delay for RK356x</title>
<updated>2025-02-19T15:26:11Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-02-09T23:27:55Z</published>
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<id>urn:sha1:c4ec920cb9452a59ab054f98debecd41c4f21515</id>
<content type='text'>
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.

Change to disable RX and/or TX delay and using zero as delay value.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: rockchip: rk3328: Fix pinmux for GPIO2-B and GPIO3-B pins</title>
<updated>2025-02-19T15:24:48Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-01-06T21:39:42Z</published>
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<id>urn:sha1:d5a3fb9ef82a99f3d6498d562691a6a3c84c5528</id>
<content type='text'>
The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width,
correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is
recalculated so it remain unchanged. Add missing GPIO3-B1 to GPIO3-B7
pinmux data to rk3328_mux_recalced_data as mux register offset for these
pins does not follow rockchip convention.

This matches changes in following Linux commits:
- e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins")
- 5ef6914e0bf5 ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins")
- 128f71fe014f ("pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins")

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>led: fix coverity scan error</title>
<updated>2025-02-18T18:30:53Z</updated>
<author>
<name>Heiko Schocher</name>
<email>hs@denx.de</email>
</author>
<published>2025-02-12T09:10:55Z</published>
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<id>urn:sha1:cdc67e27500fbde1fc42528c38842e5c5d785a51</id>
<content type='text'>
The following was reported by Covervity scan:

*** CID 541279:    (TAINTED_SCALAR)
/drivers/led/led-uclass.c: 284 in led_get_function_name()
278                     if (!ret) {
279                             snprintf(uc_plat-&gt;name, LED_MAX_NAME_SIZE,
280                                      "%s:%s-%d",
281                                      cp ? "" : led_colors[color],
282                                      func ? func : "", enumerator);
283                     } else {
&gt;&gt;&gt;     CID 541279:    (TAINTED_SCALAR)
&gt;&gt;&gt;     Using tainted variable "color" as an index into an array "led_colors".

Fix it.
Addresses-Coverity-ID: 541279 (TAINTED_SCALAR)
Link: https://lists.denx.de/pipermail/u-boot/2025-February/580250.html
Signed-off-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>power: regulator: tps65941: Fix voltage calculation for ldo</title>
<updated>2025-02-18T16:49:36Z</updated>
<author>
<name>Udit Kumar</name>
<email>u-kumar1@ti.com</email>
</author>
<published>2025-02-11T17:51:58Z</published>
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<id>urn:sha1:e93f11148ae42bbb805077a48ab8cb63137a3a17</id>
<content type='text'>
As per TRM[0] Section 8.7.1 "TPS6594-Q1 Registers", LDOx_Vout
bit 6-1, define the NVM voltage settings.
Along side table 8-4 of above TRM, shows voltage to value mapping.

Driver wrongly using bits 5-1 to calculate voltage, and to convert
voltage to value driver was using buck's calculation.
So fix those calculation.

[0]: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf

Fixes: 5d7dbd22cf7d ("power: regulator: tps65941: use function callbacks for conversion ops")
Signed-off-by: Udit Kumar &lt;u-kumar1@ti.com&gt;
Reviewed-by: Neha Malcom Francis &lt;n-francis@ti.com&gt;
</content>
</entry>
<entry>
<title>tpm: unconstify tpm_tis_chip_data</title>
<updated>2025-02-18T14:26:43Z</updated>
<author>
<name>Ilias Apalodimas</name>
<email>ilias.apalodimas@linaro.org</email>
</author>
<published>2025-02-06T09:28:56Z</published>
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<id>urn:sha1:92880a58cafc93c0907b9d3a6b13e6425366b7c0</id>
<content type='text'>
The struct contains an iomem pointer that we later remap and update.
Remove const from the struct definition.

Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra20: adjust pin type detection</title>
<updated>2025-02-12T08:35:17Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2024-12-06T15:50:58Z</published>
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<id>urn:sha1:efb7964cc1613bed0550510116f11fe757c025f8</id>
<content type='text'>
Pin detection on t20 depends on node name. With recent changes
in node naming, let's remove '_' to be safe about both '_' or
'-' use.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
</content>
</entry>
<entry>
<title>pmic: palmas: bind sysreset to parent node</title>
<updated>2025-02-12T08:34:52Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2024-12-09T10:58:19Z</published>
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<id>urn:sha1:aab837d7fc776ef956d07f97ad15cb4256a146af</id>
<content type='text'>
Bind SYSRESET child to parent node since it does not have
its own node in the device tree.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
<entry>
<title>pmic: max77663: bind children to parent node</title>
<updated>2025-02-12T08:34:32Z</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2024-12-09T10:51:33Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1ca8ec80f29a5a45dcb702a1164f9b42a077914f'/>
<id>urn:sha1:1ca8ec80f29a5a45dcb702a1164f9b42a077914f</id>
<content type='text'>
Bind GPIO and SYSRESET children to parent node since they
do not have their own nodes in the device tree.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
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