u-boot.git/dts, branch v2025.04 Unnamed repository; edit this file 'description' to name the repository. arm64: dts: rockchip: Fix sdmmc access on rk3308-rock-s0 v1.1 boards 2025-02-19T15:26:40+00:00 Jonas Karlman jonas@kwiboo.se 2025-02-04T21:38:43+00:00 d69097683d65652554639e9ff8cdb53e6e3ee63b BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MCI driver set PRWEN high on MMC_POWER_UP and low on MMC_POWER_OFF. Similarly U-Boot also set PRWEN high before accessing mmc. However, HW revision prior to v1.2 must pull GPIO4_D6 low to access sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact. Model an always-on active low fixed regulator using GPIO4_D6 to fix use of sdmmc on older HW revisions of the board. Fixes: adeb5d2a4ba4 ("arm64: dts: rockchip: Add Radxa ROCK S0") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20241119230838.4137130-1-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 26c100232b09ced0857306ac9831a4fa9c9aa231 ] (cherry picked from commit ca8e0bedbc790b19b11efc223677d178b8eeb74e) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> 
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MCI
driver set PRWEN high on MMC_POWER_UP and low on MMC_POWER_OFF.
Similarly U-Boot also set PRWEN high before accessing mmc.

However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.

Model an always-on active low fixed regulator using GPIO4_D6 to fix
use of sdmmc on older HW revisions of the board.

Fixes: adeb5d2a4ba4 ("arm64: dts: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20241119230838.4137130-1-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 26c100232b09ced0857306ac9831a4fa9c9aa231 ]

(cherry picked from commit ca8e0bedbc790b19b11efc223677d178b8eeb74e)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Subtree merge tag 'v6.13-dts' of dts repo [1] into dts/upstream 2025-01-26T22:19:33+00:00 Tom Rini trini@konsulko.com 2025-01-26T22:17:48+00:00 d8a7100d658eb201fa0e955667fdff298db31945 [1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git [rockchip fixes from Jonas Karlman via IRC] 
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git

[rockchip fixes from Jonas Karlman via IRC]
Merge patch series "upl: Prerequite patches for updated spec" 2025-01-22T23:08:47+00:00 Tom Rini trini@konsulko.com 2025-01-22T22:08:34+00:00 a3b71cc6f5cc74d4edc5808790a3d2999ea3f7fe Simon Glass <sjg@chromium.org> says: The current UPL spec[1] has been tidied up and improved over the last year, since U-Boot's original UPL support was written. This series includes some prerequisite patches needed for the real UPL patches. It is split from [2] [1] https://github.com/UniversalPayload/spec/tree/3f1450d [2] https://patchwork.ozlabs.org/project/uboot/list/?series=438574&state=* Link: https://lore.kernel.org/r/20250111000029.245022-1-sjg@chromium.org 
Simon Glass <sjg@chromium.org> says:

The current UPL spec[1] has been tidied up and improved over the last
year, since U-Boot's original UPL support was written.

This series includes some prerequisite patches needed for the real UPL
patches. It is split from [2]

[1] https://github.com/UniversalPayload/spec/tree/3f1450d
[2] https://patchwork.ozlabs.org/project/uboot/list/?series=438574&state=*

Link: https://lore.kernel.org/r/20250111000029.245022-1-sjg@chromium.org
emulation: fdt: Relax condition for OF_HAS_PRIOR_STAGE 2025-01-22T23:08:08+00:00 Simon Glass sjg@chromium.org 2025-01-11T00:00:16+00:00 24768a23a9b36fe2ae9814c166dc8912f981ff3b QEMU always gets its devicetree from the OF_BOARD mechanism so we should not depend on !BLOBLIST here. It's not clear why we need to have any relationship with BLOBLIST so let's remove the entire condition. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 2b71470628c dts: OF_HAS_PRIOR_STAGE should depend on !BLOBLIST Reviewed-by: Tom Rini <trini@konsulko.com> 
QEMU always gets its devicetree from the OF_BOARD mechanism so we should
not depend on !BLOBLIST here.

It's not clear why we need to have any relationship with BLOBLIST so
let's remove the entire condition.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 2b71470628c dts: OF_HAS_PRIOR_STAGE should depend on !BLOBLIST
Reviewed-by: Tom Rini <trini@konsulko.com>
arm64: dts: qcom: qcs9100: Add support for the QCS9100 Ride and Ride Rev3 boards 2025-01-22T15:26:51+00:00 Tengfei Fan quic_tengfan@quicinc.com 2025-01-10T05:08:12+00:00 5c713a9cf1f23a2ed70a15ef83181fcdb4375a2a Add device tree support for the QCS9100 Ride and Ride Rev3 boards. The QCS9100 is a variant of the SA8775p, and they are fully compatible with each other. The QCS9100 Ride/Ride Rev3 board is essentially the same as the SA8775p Ride/Ride Rev3 board, with the QCS9100 SoC mounted instead of the SA8775p. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> Reviewed-by: Konrad Dybcio <konradybcio@kernel.org> Link: https://lore.kernel.org/r/20240911-add_qcs9100_support-v2-4-e43a71ceb017@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> [ upstream commit: 7dcc1dfaa3d1cd3aafed2beb7086ed34fdb22303 ] (cherry picked from commit db6231faa8ef46e5ff5d5ece0c930a07c6358562) Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Link: https://lore.kernel.org/r/20250110050817.3819282-2-quic_varada@quicinc.com Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> 
Add device tree support for the QCS9100 Ride and Ride Rev3 boards. The
QCS9100 is a variant of the SA8775p, and they are fully compatible with
each other. The QCS9100 Ride/Ride Rev3 board is essentially the same as
the SA8775p Ride/Ride Rev3 board, with the QCS9100 SoC mounted instead
of the SA8775p.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240911-add_qcs9100_support-v2-4-e43a71ceb017@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

[ upstream commit: 7dcc1dfaa3d1cd3aafed2beb7086ed34fdb22303 ]

(cherry picked from commit db6231faa8ef46e5ff5d5ece0c930a07c6358562)

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Link: https://lore.kernel.org/r/20250110050817.3819282-2-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
arm64: dts: rockchip: add Radxa ROCK 5C 2025-01-11T00:56:17+00:00 FUKAUMI Naoki naoki@radxa.com 2025-01-04T01:57:03+00:00 a0dd3480a7dc028b23ab640eacb652c5b0cf2b77 Radxa ROCK 5C is a 8K computer for everything[1] using the Rockchip RK3588S2 chip: - Rockchip RK3588S2 - Quad A76 and Quad A55 CPU - 6 TOPS NPU - up to 32GB LPDDR4x RAM - eMMC / SPI flash connector - Micro SD Card slot - Gigabit ethernet port (supports PoE with add-on PoE HAT) - WiFi6 / BT5.4 - 1x USB 3.0 Type-A HOST port - 1x USB 3.0 Type-A OTG port - 2x USB 2.0 Type-A HOST port - 1x USB Type-C 5V power port [1] https://radxa.com/products/rock5/5c Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://lore.kernel.org/r/20241021090548.1052-2-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 3ddf5cdb77e6efd6fe9b70f36dec935e324a3cd2 ] (cherry picked from commit f80689fcef4b9b07a97b629b4075cc1a4c21a68e) Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
Radxa ROCK 5C is a 8K computer for everything[1] using the Rockchip
RK3588S2 chip:

- Rockchip RK3588S2
- Quad A76 and Quad A55 CPU
- 6 TOPS NPU
- up to 32GB LPDDR4x RAM
- eMMC / SPI flash connector
- Micro SD Card slot
- Gigabit ethernet port (supports PoE with add-on PoE HAT)
- WiFi6 / BT5.4
- 1x USB 3.0 Type-A HOST port
- 1x USB 3.0 Type-A OTG port
- 2x USB 2.0 Type-A HOST port
- 1x USB Type-C 5V power port

[1] https://radxa.com/products/rock5/5c

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20241021090548.1052-2-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 3ddf5cdb77e6efd6fe9b70f36dec935e324a3cd2 ]

(cherry picked from commit f80689fcef4b9b07a97b629b4075cc1a4c21a68e)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arm64: dts: rockchip: Add HDMI0 node to rk3588 2025-01-11T00:56:17+00:00 Cristian Ciocaltea cristian.ciocaltea@collabora.com 2025-01-04T01:57:02+00:00 2cbffc157930baa773c7acc1c727436ab5e9e728 Add support for the HDMI0 output port found on RK3588 SoC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-1-466cd80e8ff9@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: d7bb71e69f58c1b3665a9f926bf8d3855111bf8e ] (cherry picked from commit a839348380c2072e00a26bbdb80744982fe04c56) Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
Add support for the HDMI0 output port found on RK3588 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20241019-rk3588-hdmi0-dt-v2-1-466cd80e8ff9@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: d7bb71e69f58c1b3665a9f926bf8d3855111bf8e ]

(cherry picked from commit a839348380c2072e00a26bbdb80744982fe04c56)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arm64: dts: rockchip: Split up RK3588's PCIe pinctrls 2025-01-11T00:56:17+00:00 Sam Edwards cfsworks@gmail.com 2025-01-04T01:57:01+00:00 d113d47976c6428e5afc48445e0561f61f657618 These pinctrls manage the low-speed PCIe signals: - CLKREQ#: An output on the RK3588 (both RC or EP modes), used to request that external clock-generation circuitry provide a clock. - PERST#: An input on the RK3588 in EP mode, used to detect a reset signal from the RC. In RC mode, the hardware does not use this signal: Linux itself generates it by putting the pin in GPIO mode. - WAKE#: In EP mode, this is an output; in RC mode, this is an input. Each of these signals serves a distinct purpose, and more importantly, PERST# should not be muxed when the RK3588 is in the RC role. Bundling them together in pinctrl groups prevents proper use: indeed, almost none of the current board-specific .dts files make any use of them. (Exception: Rock 5A recently had a patch land that misuses _pins; this patch corrects that.) However, on some RK3588 boards, the PCIe 3 controller will indefinitely stall the boot if CLKREQ# is not muxed (details in the next patch). This patch unbundles the signals to allow them to be used. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Link: https://lore.kernel.org/r/20240912025034.180233-2-CFSworks@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 4294e32111781b3de4d73b944cbd1bc1662a9a7a ] (cherry picked from commit 8713425fa162b61bcf5f7a6dcd171fddfb12be36) Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
These pinctrls manage the low-speed PCIe signals:
- CLKREQ#: An output on the RK3588 (both RC or EP modes), used to
  request that external clock-generation circuitry provide a clock.
- PERST#: An input on the RK3588 in EP mode, used to detect a reset
  signal from the RC. In RC mode, the hardware does not use this signal:
  Linux itself generates it by putting the pin in GPIO mode.
- WAKE#: In EP mode, this is an output; in RC mode, this is an input.

Each of these signals serves a distinct purpose, and more importantly,
PERST# should not be muxed when the RK3588 is in the RC role. Bundling
them together in pinctrl groups prevents proper use: indeed, almost none
of the current board-specific .dts files make any use of them.
(Exception: Rock 5A recently had a patch land that misuses _pins; this
 patch corrects that.)

However, on some RK3588 boards, the PCIe 3 controller will indefinitely
stall the boot if CLKREQ# is not muxed (details in the next patch).
This patch unbundles the signals to allow them to be used.

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Link: https://lore.kernel.org/r/20240912025034.180233-2-CFSworks@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 4294e32111781b3de4d73b944cbd1bc1662a9a7a ]

(cherry picked from commit 8713425fa162b61bcf5f7a6dcd171fddfb12be36)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arm64: dts: rockchip: reorder mmc aliases for NanoPi R3S 2025-01-11T00:56:16+00:00 Tianling Shen cnsztl@gmail.com 2024-12-26T09:20:42+00:00 c16cd170b903c25056d214df0277e415d1bc9dc7 Typically any non-removable storage (emmc) is listed before removable storage (sd-card) options. Also U-Boot will try to override and use mmc0=sdhci and mmc1=sdmmc0 for all rk356x boards. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-6-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: b7cd1115456d312f8c5e60c80fdc35fd35ea6eab ] Signed-off-by: Tianling Shen <cnsztl@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
Typically any non-removable storage (emmc) is listed before removable
storage (sd-card) options. Also U-Boot will try to override and use
mmc0=sdhci and mmc1=sdmmc0 for all rk356x boards.

Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20241022193537.1117919-6-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: b7cd1115456d312f8c5e60c80fdc35fd35ea6eab ]

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arm64: dts: rockchip: enable eMMC HS200 mode for NanoPi R3S 2025-01-11T00:56:16+00:00 Tianling Shen cnsztl@gmail.com 2024-12-26T09:20:41+00:00 30db98ed87d261d292684ce3f1da804e9182f983 It is required to boot from eMMC without additional patch in u-boot. Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board") Suggested-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20241022193537.1117919-5-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 1b5365034410f1ca21adadadd492b99bdf4f2c55 ] Signed-off-by: Tianling Shen <cnsztl@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
It is required to boot from eMMC without additional patch in u-boot.

Fixes: 50decd493c83 ("arm64: dts: rockchip: Add FriendlyARM NanoPi R3S board")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20241022193537.1117919-5-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

[ upstream commit: 1b5365034410f1ca21adadadd492b99bdf4f2c55 ]

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>