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<title>u-boot.git/include/acpi, branch next</title>
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<updated>2026-08-10T20:22:09Z</updated>
<entry>
<title>serial: coreboot: Accept DBG2 subtype 0x12</title>
<updated>2026-08-10T20:22:09Z</updated>
<author>
<name>Desapogu Jayaramudu</name>
<email>jayaramudu.desapogu@amd.com</email>
</author>
<published>2026-07-30T03:43:16Z</published>
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<id>urn:sha1:780808133b756261c1c1a0aacb4c7067fc97857b</id>
<content type='text'>
U-Boot running as a coreboot payload obtains serial console
information either from the coreboot table or from the ACPI DBG2
table.

When serial console support is disabled in coreboot, the coreboot
table does not contain serial information. In this case U-Boot falls
back to parsing the DBG2 table.

Some AMD platforms or any other platforms that uses memory-mapped I/O
advertise the debug UART using DBG2 subtype 0x0012 ("16550-compatible
with parameters defined in Generic Address Structure"). U-Boot
currently accepts only subtype 0x0000, causing DBG2 UART detection to
fail and leaving no console output.

Accept subtype 0x0012 as well and keep the existing handling logic.

Signed-off-by: Desapogu Jayaramudu &lt;jayaramudu.desapogu@amd.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>acpi: use U-Boot ACPI vendor ID</title>
<updated>2025-11-06T14:30:33Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2025-10-31T19:52:53Z</published>
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<id>urn:sha1:b790f31752d7650d5f557509f17b1396f0cc1f70</id>
<content type='text'>
The U-Boot project has been assigned the vendor ID 'UBOO' [1]. Use this
vendor ID and our release version in the ACPI table headers.

[1] ACPI ID Registry
    https://uefi.org/ACPI_ID_List

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "acpi: simplify updating ACPI table header checksum"</title>
<updated>2025-04-08T22:23:27Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-08T21:23:06Z</published>
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<id>urn:sha1:fba8bfdd0bf2db1edd0383ba89a0c6037a6fe807</id>
<content type='text'>
Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt; says:

Introduce a new function to update ACPI table headers.
This allows to simplify the existing code.

Link: https://lore.kernel.org/r/20250321232121.251800-1-heinrich.schuchardt@canonical.com
</content>
</entry>
<entry>
<title>acpi: new function acpi_update_checksum()</title>
<updated>2025-04-08T21:22:56Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2025-03-21T23:21:16Z</published>
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<id>urn:sha1:69e61d46d2dcdcf84a3a7aed7cf74ac3b3b850fd</id>
<content type='text'>
Introduce a new function to update ACPI table headers.
This allows to simplify the existing code.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Matthias Brugger &lt;mbrugger@suse.com&gt;
Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>acpi: Mark struct acpi_rsdp as packed</title>
<updated>2025-04-03T17:41:55Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-03-15T14:25:57Z</published>
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<id>urn:sha1:8d6097d30041e8b0f0238a30e877967895f738f3</id>
<content type='text'>
At present the size of this struct is too large on 64-bit machines.
Annotate it with __packed to fix this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm: cpu: Add ACPI parking protocol support</title>
<updated>2024-10-27T23:24:13Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:20:13Z</published>
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<id>urn:sha1:34bfe8eff895b864247d923ce37110a9053592ee</id>
<content type='text'>
On Arm platforms that use ACPI they cannot rely on the "spin-table"
CPU bringup usually defined in the FDT. Thus implement the
'ACPI Multi-processor Startup for ARM Platforms', also referred to as
'ACPI parking protocol'.

The ACPI parking protocol works similar to the spin-table mechanism, but
the specification also covers lots of shortcomings of the spin-table
implementations.

Every CPU defined in the ACPI MADT table has it's own 4K page where the
spinloop code and the OS mailbox resides. When selected the U-Boot board
code must make sure that the secondary CPUs enter u-boot after relocation
as well, so that they can enter the spinloop code residing in the ACPI
parking protocol pages.

The OS will then write to the mailbox and generate an IPI to release the
CPUs from the spinloop code.

For now it's only implemented on ARMv8, but can easily be extended to
other platforms, like ARMv7.

TEST: Boots all CPUs on qemu-system-aarch64 -machine raspi4b

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>acpi: Add processor device</title>
<updated>2024-10-27T23:24:13Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:19:58Z</published>
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<id>urn:sha1:4ac655cd1a9108e0381e254afdeeffb607075096</id>
<content type='text'>
Add a new method to write the processor device identified by _HID
ACPI0007, that is preferred over the Processor OpCode since ACPI 6.0.

Fixes booting arm using ACPI only since the Processor OpCode isn't
found valid by the Linux kernel.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>acpi: Move function prototype</title>
<updated>2024-10-27T23:24:13Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:19:55Z</published>
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<id>urn:sha1:3451e03238fbd22240eee9dcee7bee857afd931a</id>
<content type='text'>
Allow other architectures to use acpi_create_mcfg_mmconfig as well
by moving the function prototype to common code.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>acpi: acpi_table: Add IORT support</title>
<updated>2024-10-27T23:24:13Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:19:54Z</published>
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<id>urn:sha1:bf5d37662da52f3844fdfb245b135272da7774d5</id>
<content type='text'>
The SoC can implement acpi_fill_iort to update the IORT table.
Add a helper function to fill out the NAMED_COMPONENT node.

TEST=Run FWTS V24.03.00 on RPi4 and round no problems.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>acpi: Add ACPITAB for PPTT and GTDT</title>
<updated>2024-10-27T23:24:13Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:19:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7f91bcac1eef8119a68a4e3a559f85728df1bbdc'/>
<id>urn:sha1:7f91bcac1eef8119a68a4e3a559f85728df1bbdc</id>
<content type='text'>
Return the ACPI table revision in acpi_get_table_revision() for
PPTT and GTDT. Match both to ACPI 6.2.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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