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<title>u-boot.git/include/altera.h, branch v2016.09-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>fpga: altera: Add StratixV support</title>
<updated>2016-03-24T08:47:43+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-02-12T12:48:02+00:00</published>
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<id>ff9c4c535a8b722c54d45e77aa083fa08552341d</id>
<content type='text'>
This patch adds support for programming of the StratixV FPGAs. Programming
is done in this case (board theadorable) via SPI. The board may provide
board specific code for bitstream programming.

This StratixV support will be used by the theadorable board.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
This patch adds support for programming of the StratixV FPGAs. Programming
is done in this case (board theadorable) via SPI. The board may provide
board specific code for bitstream programming.

This StratixV support will be used by the theadorable board.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>arm: socfpga: fpga: Add SoCFPGA FPGA programming interface</title>
<updated>2014-10-06T15:46:50+00:00</updated>
<author>
<name>Pavel Machek</name>
<email>pavel@denx.de</email>
</author>
<published>2014-09-08T12:08:45+00:00</published>
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<id>230fe9b202ff0ca396ad9a564816cc87d42daa6e</id>
<content type='text'>
Add code necessary to program the FPGA part of SoCFPGA from U-Boot
with an RBF blob. This patch also integrates the code into the
FPGA driver framework in U-Boot so it can be used via the 'fpga'
command.

Signed-off-by: Pavel Machek &lt;pavel@denx.de&gt;
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;

V2: Move the not-CPU specific stuff into drivers/fpga/ and base
    this on the cleaned up altera FPGA support.
</content>
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<pre>
Add code necessary to program the FPGA part of SoCFPGA from U-Boot
with an RBF blob. This patch also integrates the code into the
FPGA driver framework in U-Boot so it can be used via the 'fpga'
command.

Signed-off-by: Pavel Machek &lt;pavel@denx.de&gt;
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;

V2: Move the not-CPU specific stuff into drivers/fpga/ and base
    this on the cleaned up altera FPGA support.
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: altera: Clean up enums in altera.h</title>
<updated>2014-10-06T15:31:42+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2014-09-16T18:48:33+00:00</published>
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<id>d44ef7ffbfef26f71d5811006f00fc82e941fe98</id>
<content type='text'>
Get rid of the line-over-80 problems and zap the typedef that
went alongside those enums.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
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<pre>
Get rid of the line-over-80 problems and zap the typedef that
went alongside those enums.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>whitespace cleanups</title>
<updated>2014-07-22T11:44:27+00:00</updated>
<author>
<name>Pavel Machek</name>
<email>pavel@denx.de</email>
</author>
<published>2014-07-19T21:50:44+00:00</published>
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<id>3f9eb6e1095b791867975c236bd7ab8b0a51acf4</id>
<content type='text'>
Whitespace cleanups.

Signed-off-by: Pavel Machek &lt;pavel@denx.de&gt;
</content>
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<pre>
Whitespace cleanups.

Signed-off-by: Pavel Machek &lt;pavel@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19+00:00</published>
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<id>1a4596601fd395f3afb8f82f3f840c5e00bdd57a</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
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<pre>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Remove all CONFIG_SYS_* fpga related options</title>
<updated>2013-05-06T08:41:30+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2013-05-01T16:05:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b03b25caea1ff3a501161f5bc1ad5e5b5b124e0c'/>
<id>b03b25caea1ff3a501161f5bc1ad5e5b5b124e0c</id>
<content type='text'>
All these macros are completely unused by any code.
CONFIG_FPGA is not a bitfield anymore.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
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<pre>
All these macros are completely unused by any code.
CONFIG_FPGA is not a bitfield anymore.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: constify to fix build warning</title>
<updated>2011-08-01T13:19:40+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2011-07-30T13:33:49+00:00</published>
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<id>e6a857da746d5d7d450e59c0f86664c6b279b1c2</id>
<content type='text'>
Fix compiler warning:

cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data'
from incompatible pointer type

Adding the needed 'const' here entails a whole bunch of additonal
changes all over the FPGA code.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Andre Schwarz &lt;andre.schwarz@matrix-vision.de&gt;
Cc: Murray Jensen &lt;Murray.Jensen@csiro.au&gt;
Acked-by: Andre Schwarz&lt;andre.schwarz@matrix-vision.de&gt;
</content>
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<pre>
Fix compiler warning:

cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data'
from incompatible pointer type

Adding the needed 'const' here entails a whole bunch of additonal
changes all over the FPGA code.

Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Andre Schwarz &lt;andre.schwarz@matrix-vision.de&gt;
Cc: Murray Jensen &lt;Murray.Jensen@csiro.au&gt;
Acked-by: Andre Schwarz&lt;andre.schwarz@matrix-vision.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cosmetic: spell fixes etc.</title>
<updated>2011-07-28T14:32:50+00:00</updated>
<author>
<name>Michael Jones</name>
<email>michael.jones@matrix-vision.de</email>
</author>
<published>2011-07-14T22:09:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f9a78b8d4f1e9b42eb0563029a22fd6c34390088'/>
<id>f9a78b8d4f1e9b42eb0563029a22fd6c34390088</id>
<content type='text'>
Signed-off-by: Michael Jones &lt;michael.jones@matrix-vision.de&gt;
Acked-by: Detlev Zundel &lt;dzu@denx.de&gt;
</content>
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<pre>
Signed-off-by: Michael Jones &lt;michael.jones@matrix-vision.de&gt;
Acked-by: Detlev Zundel &lt;dzu@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Remove relocation fixups</title>
<updated>2009-10-03T08:17:56+00:00</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2009-09-21T16:20:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6385b28116f775da4771b768ba9bf93c3aaaf26e'/>
<id>6385b28116f775da4771b768ba9bf93c3aaaf26e</id>
<content type='text'>
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups.  Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
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<pre>
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups.  Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rename CFG_ macros to CONFIG_SYS</title>
<updated>2008-10-18T19:54:03+00:00</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-10-16T13:01:15+00:00</published>
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<content type='text'>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
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<pre>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</pre>
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