u-boot.git/include/asm-arm/arch-at91, branch v2009.08Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/include/asm-arm/arch-at91?h=v2009.082009-07-12T15:56:11Zat91: Introduction of at91sam9g10 SOC.2009-07-12T15:56:11ZSedji Gaouaousedji.gaouaou@atmel.com2009-06-25T15:04:15Zurn:sha1:5ccc2d99d61c81805348b0cd9f79731b271f7daf
AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a
faster clock speed: 266/133MHz.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
at91: Introduction of at91sam9g45 SOC.2009-07-12T15:43:34ZSedji Gaouaousedji.gaouaou@atmel.com2009-07-09T08:16:29Zurn:sha1:22ee647380c42f44528f99b7c1b423725e542102
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.
The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES.
On the board you can find 2 USART, USB high speed,
a 480*272 LG lcd, ethernet, gpio/joystick/buttons.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
at91: Add CAN init function2009-07-06T19:52:43ZDaniel GorsulowskiDaniel.Gorsulowski@esd.eu2009-06-30T21:03:33Zurn:sha1:45627fce18139a74e0755124d27376b520db156c
To enable CAN init, CONFIG_CAN has to be defined in the board config file
and at91_can_hw_init() has to be called in the board specific code.
CAN is available on AT91SAM9263 and AT91CAP9 SoC.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
at91: unify nor boot support2009-06-21T14:18:12ZJean-Christophe PLAGNIOL-VILLARDplagnioj@jcrosoft.com2009-06-13T10:50:04Zurn:sha1:8096c51fd4e611ed666dbe77767e81af5d94fc7b
the lowlevel init sequence is the same so unify it
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
pm9263: use macro instead of hardcode value for the lowlevel_init2009-06-21T14:18:11ZJean-Christophe PLAGNIOL-VILLARDplagnioj@jcrosoft.com2009-06-12T19:20:38Zurn:sha1:01550a2b650fbabc03334f9eadcc6083601a2414
optimize a few the RAM init
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
at91: move cpu name define to arm/arch/ cpu header2009-06-12T18:39:53ZJean-Christophe PLAGNIOL-VILLARDplagnioj@jcrosoft.com2009-05-31T10:44:46Zurn:sha1:b32e189079fa16e1b647ac6b949fd4e0a9435343
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
at91: add support for the PM9263 board of Ronetix GmbH2009-04-16T19:30:48ZIlko Ilieviliev@ronetix.at2009-04-16T19:30:48Zurn:sha1:f0a2c7b4b64eacd06bb272856bcc056be8719f5a
The PM9263 board is based on the AT91SAM9263-EK board.
Here is the page on Ronetix website:
http://www.ronetix.at/starter_kit_9263.html
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
at91sam9/at91cap: improve clock framework2009-04-16T19:30:44ZJean-Christophe PLAGNIOL-VILLARDplagnioj@jcrosoft.com2009-04-16T19:30:44Zurn:sha1:dc39ae9513c32dfeb9e018dc0d22c6484514fefb
calculate dynamically the clock rate and pllb setting for usb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
at91sam9: add watchdog support2009-04-04T18:42:19ZJean-Christophe PLAGNIOL-VILLARDplagnioj@jcrosoft.com2009-03-27T22:26:42Zurn:sha1:843a2654bce74192de2b5a43474fdc27a572ab40
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.2009-03-22T13:48:16ZNicolas Ferrenicolas.ferre@atmel.com2009-03-22T13:48:16Zurn:sha1:df486b1fa3f750b153eac7daa0b3bf1f594e5098
AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed.
The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board.
It is essentially the same, with a few minor differences.
Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/product_card.asp?part_id=4337
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>