u-boot.git/include/asm-arm/arch-spear, branch v2010.03Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/include/asm-arm/arch-spear?h=v2010.032010-03-21T21:22:53Zmod change 755 => 644 for multiple files2010-03-21T21:22:53ZThomas Weberswirl@gmx.li2010-03-13T22:14:45Zurn:sha1:5647f78d04174b0b99857d2a7cbf25141bd14a45
I executed 'find . -name "*.[chS]" -perm 755 -exec chmod 644 {} \;'
Signed-off-by: Thomas Weber <swirl@gmx.li>
Add some more: neither Makefile nor config.mk need execute permissions.
Signed-off-by: Wolfgang Denk <wd@denx.de>
SPEAr : emi controller initialization for CFI driver support2010-01-23T14:15:50ZVipin KUMARvipin.kumar@st.com2010-01-15T13:45:51Zurn:sha1:4bfacad4e796f2e121ee7432705ecc9c61e7b6ca
SPEAr310 and SPEAr320 SoCs contain an EMI controller to interface
Paraller NOR flashes. This patch adds the support for this IP
The standard CFI driver is used to interface with NOR flashes
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr : Support for HW mac id read/write from i2c mem2010-01-23T14:15:49ZVipin KUMARvipin.kumar@st.com2010-01-15T13:45:49Zurn:sha1:f92994f0f7403b84366ce04e554e461f624e6868
This patch adds the support to read and write mac id from i2c
memory.
For reading:
if (env contains ethaddr)
pick env ethaddr
else
pick ethaddr from i2c memory
For writing:
chip_config ethaddr XX:XX:XX:XX:XX:XX writes the mac id
in i2c memory
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr : Support added for SPEAr600 board2010-01-23T14:15:49ZVipin KUMARvipin.kumar@st.com2010-01-15T13:45:48Zurn:sha1:566c9c16fe4e501c3193ae6605bc9c663c6ea706
SPEAr600 SoC support contains basic spear600 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr : nand driver support for SPEAr SoCs2010-01-23T14:15:49ZVipin KUMARvipin.kumar@st.com2010-01-15T13:45:46Zurn:sha1:165fa406ad8c39c0c32a31476a8a9bda3db72851
SPEAr SoCs contain an FSMC controller which can be used to interface
with a range of memories eg. NAND, SRAM, NOR.
Currently, this driver supports interfacing FSMC with NAND memories
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr : smi driver support for SPEAr SoCs2010-01-23T14:15:49ZVipin KUMARvipin.kumar@st.com2010-01-15T13:45:45Zurn:sha1:a6e34f76c51c8514f1b691fc60394f09ae4fb2ff
SPEAr SoCs contain a serial memory interface controller. This
controller is used to interface with spi based memories.
This patch adds the driver for this IP.
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr : i2c driver support added for SPEAr SoCs2010-01-23T14:15:49ZVipin KUMARvipin.kumar@st.com2010-01-15T13:45:44Zurn:sha1:2403f8f417b1b94701bb5949903d701f1f414a42
SPEAr SoCs contain a synopsys i2c controller.
This patch adds the driver for this IP.
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr : Adding basic SPEAr architecture support.2010-01-23T14:15:49ZVipin KUMARvipin.kumar@st.com2010-01-15T13:45:43Zurn:sha1:81c0ebf623ddbb6a4da8e051441c83e99a01b00b
SPEAr Architecture support added. It contains the support for
following SPEAr blocks
- Timer
- System controller
- Misc registers
Signed-off-by: Vipin <vipin.kumar@st.com>