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<title>u-boot.git/include/asm-avr32, branch v1.3.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on 32bit targets.</title>
<updated>2008-02-23T08:49:48+00:00</updated>
<author>
<name>Shinya Kuribayashi</name>
<email>skuribay@ruby.dti.ne.jp</email>
</author>
<published>2008-02-23T08:24:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b075d74efb70ff68c49a2532f26b56d6703b69c1'/>
<id>b075d74efb70ff68c49a2532f26b56d6703b69c1</id>
<content type='text'>
----------------------------------------------------------------
Olaf Hering [Wed, 17 Oct 2007 06:27:13 +0000 (23:27 -0700)]

Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on
32bit targets.

GCC can be made to warn about usage of long long types with ISO C90
(-ansi), but only with -pedantic.  You can write this in a way that even
then it doesn't cause warnings, namely by:

#ifdef __GNUC__
__extension__ typedef __signed__ long long __s64;
__extension__ typedef unsigned long long __u64;
#endif

The __extension__ keyword in front of this switches off any pedantic
warnings for this expression.

Signed-off-by: Olaf Hering &lt;olh@suse.de&gt;
Cc: &lt;linux-arch@vger.kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
----------------------------------------------------------------

Signed-off-by: Shinya Kuribayashi &lt;skuribay@ruby.dti.ne.jp&gt;
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<pre>
----------------------------------------------------------------
Olaf Hering [Wed, 17 Oct 2007 06:27:13 +0000 (23:27 -0700)]

Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on
32bit targets.

GCC can be made to warn about usage of long long types with ISO C90
(-ansi), but only with -pedantic.  You can write this in a way that even
then it doesn't cause warnings, namely by:

#ifdef __GNUC__
__extension__ typedef __signed__ long long __s64;
__extension__ typedef unsigned long long __u64;
#endif

The __extension__ keyword in front of this switches off any pedantic
warnings for this expression.

Signed-off-by: Olaf Hering &lt;olh@suse.de&gt;
Cc: &lt;linux-arch@vger.kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
----------------------------------------------------------------

Signed-off-by: Shinya Kuribayashi &lt;skuribay@ruby.dti.ne.jp&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>AVR32: Make SDRAM refresh rate configurable</title>
<updated>2008-02-05T11:14:27+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2008-01-23T16:20:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d38da537943cd36356b9d3d9d9b60533554b81d8'/>
<id>d38da537943cd36356b9d3d9d9b60533554b81d8</id>
<content type='text'>
The existing code assumes the SDRAM row refresh period should always
be 15.6 us. This is not always true, and indeed on the ATNGW100, the
refresh rate should really be 7.81 us.

Add a refresh_period member to struct sdram_info and initialize it
properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will
panic() until the refresh_period member is updated properly.

Big thanks to Gerhard Berghofer for pointing out this issue.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
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<pre>
The existing code assumes the SDRAM row refresh period should always
be 15.6 us. This is not always true, and indeed on the ATNGW100, the
refresh rate should really be 7.81 us.

Add a refresh_period member to struct sdram_info and initialize it
properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will
panic() until the refresh_period member is updated properly.

Big thanks to Gerhard Berghofer for pointing out this issue.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://www.denx.de/git/u-boot-avr32</title>
<updated>2007-12-26T23:46:08+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2007-12-26T23:46:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f77ac3d657e9b1d40012153e872a2118cca10a3d'/>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>AVR32: Make some AT32AP700x peripherals optional</title>
<updated>2007-12-17T09:34:12+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-10-29T12:23:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5fee84a794a51ec830548cda485a770efb018b92'/>
<id>5fee84a794a51ec830548cda485a770efb018b92</id>
<content type='text'>
Add a chip-features file providing definitions of the form

AT32AP700x_CHIP_HAS_&lt;peripheral&gt;

to indicate the availability of the given peripheral on the currently
selected chip.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
Add a chip-features file providing definitions of the form

AT32AP700x_CHIP_HAS_&lt;peripheral&gt;

to indicate the availability of the given peripheral on the currently
selected chip.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>AVR32: Rename at32ap7000 -&gt; at32ap700x</title>
<updated>2007-12-17T09:34:12+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-10-29T12:09:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=36f28f8a9605ee5dcfa330482cfc62171261af97'/>
<id>36f28f8a9605ee5dcfa330482cfc62171261af97</id>
<content type='text'>
The SoC-specific code for all the AT32AP700x CPUs is practically
identical; the only difference is that some chips have less features
than others. By doing this rename, we can add support for the AP7000
derivatives simply by making some features conditional.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
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<pre>
The SoC-specific code for all the AT32AP700x CPUs is practically
identical; the only difference is that some chips have less features
than others. By doing this rename, we can add support for the AP7000
derivatives simply by making some features conditional.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Introduce map_physmem() and unmap_physmem()</title>
<updated>2007-12-13T12:15:16+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2007-12-13T11:56:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4d7d6936eb29af7cca330937808312aa5f61454d'/>
<id>4d7d6936eb29af7cca330937808312aa5f61454d</id>
<content type='text'>
map_physmem() returns a virtual address which can be used to access a
given physical address without involving the cache. unmap_physmem()
should be called when the virtual address returned by map_physmem() is
no longer needed.

This patch adds a stub implementation which simply returns the
physical address cast to a uchar * for all architectures except AVR32,
which converts the physical address to an uncached virtual mapping.
unmap_physmem() is a no-op on all architectures, but if any
architecture needs to do such mappings through the TLB, this is the
hook where those TLB entries can be invalidated.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
map_physmem() returns a virtual address which can be used to access a
given physical address without involving the cache. unmap_physmem()
should be called when the virtual address returned by map_physmem() is
no longer needed.

This patch adds a stub implementation which simply returns the
physical address cast to a uchar * for all architectures except AVR32,
which converts the physical address to an uncached virtual mapping.
unmap_physmem() is a no-op on all architectures, but if any
architecture needs to do such mappings through the TLB, this is the
hook where those TLB entries can be invalidated.

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>AVR32: Change prototype of memset</title>
<updated>2007-08-27T12:56:29+00:00</updated>
<author>
<name>Semih Hazar</name>
<email>semih.hazar@indefia.com</email>
</author>
<published>2007-08-20T16:00:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2c05fd125744981e5f2828d24e66ccc20a77d25d'/>
<id>2c05fd125744981e5f2828d24e66ccc20a77d25d</id>
<content type='text'>
Signed-off-by: Semih Hazar &lt;semih.hazar@indefia.com&gt;
Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
Signed-off-by: Semih Hazar &lt;semih.hazar@indefia.com&gt;
Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Move 64bit division from avr32 to generic lib</title>
<updated>2007-08-10T08:33:34+00:00</updated>
<author>
<name>Dirk Behme</name>
<email>dirk.behme@googlemail.com</email>
</author>
<published>2007-08-02T15:41:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f7c086e94e8ce9aad7268af97f73aa6884686f27'/>
<id>f7c086e94e8ce9aad7268af97f73aa6884686f27</id>
<content type='text'>
Move the 64bit division from lib_avr32 to lib_generic. With this, all
boards can do_div/__div64_32 if needed, not only avr one. Code is put
to lib_generic, so no larger memory footprint if not used. No code
modifications. Thanks for proposal by Håvard Skinnemoen.

Signed-off-by: Dirk Behme &lt;dirk.behme@gmail.com&gt;
</content>
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<pre>
Move the 64bit division from lib_avr32 to lib_generic. With this, all
boards can do_div/__div64_32 if needed, not only avr one. Code is put
to lib_generic, so no larger memory footprint if not used. No code
modifications. Thanks for proposal by Håvard Skinnemoen.

Signed-off-by: Dirk Behme &lt;dirk.behme@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge with /home/wd/git/u-boot/custodian/u-boot-avr32; code cleanup.</title>
<updated>2007-04-18T14:53:52+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2007-04-18T14:53:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b99c1e6d8eec327c4b4dd99bf4c0d1a1eba2ce0a'/>
<id>b99c1e6d8eec327c4b4dd99bf4c0d1a1eba2ce0a</id>
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<pre>
</pre>
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</entry>
<entry>
<title>Atmel MCI driver</title>
<updated>2007-04-14T14:14:06+00:00</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>hskinnemoen@atmel.com</email>
</author>
<published>2006-01-20T09:03:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fc26c97bb6df41b4a95662c34054fe912387bf38'/>
<id>fc26c97bb6df41b4a95662c34054fe912387bf38</id>
<content type='text'>
Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.

The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.

Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</content>
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<pre>
Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.

The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.

Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682

Signed-off-by: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
</pre>
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</content>
</entry>
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