Added new CONFIG_DISABLE_CONSOLE define and GD_FLG_DISABLE_CONSOLE.

When CONFIG_DISABLE_CONSOLE is defined, setting
GD_FLG_DISABLE_CONSOLE disables all console input and output.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>

The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel.  It offers versatile peripherals, such as ethernet, usb
device, usb host etc.

The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).

Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.

For more information see: http:///www.miromico.com/hammerhead

Signed-off-by: Julien May <mailinglist@miromico.ch>
[haavard.skinnemoen@atmel.com: various small fixes and adaptions]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

map_physmem() takes a phys_addr_t as parameter. This type is defined in
asm/types.h, so we need to include that file.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

This moves the MMC and SD Card command definitions from
include/asm/arch/mmc.h into include/mmc.h. These definitions are
given by the MMC and SD Card standards, not by any particular
architecture.

There's a lot more room for consolidation in the MMC drivers which
I'm hoping to get done eventually, but this patch is a start.

Compile-tested for all avr32 boards as well as lpc2292sodimm and
lubbock. This should cover all three mmc drivers in the tree.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

Adds GPIO manipulation functions for AVR32 AP7 platform.

Signed-off-by: Peter Ma <pma@mediamatech.com>
[haavard.skinnemoen@atmel.com: coding style fixup, slight simplification]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

This adds a driver for the SPI controller found on most AT91 and AVR32
chips, implementing the new SPI API.

Changed in v4:
  - Update to new API
  - Handle zero-length transfers appropriately. The user may send a
    zero-length SPI transfer with SPI_XFER_END set in order to
    deactivate the chip select after a series of transfers with chip
    select active. This is useful e.g. when polling the status
    register of DataFlash.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>