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<title>u-boot.git/include/asm-ppc/fsl_lbc.h, branch v2009.06</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Add LSDMR (SDRAM Mode Register) definition on localbus</title>
<updated>2009-03-30T18:33:49+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2009-03-26T06:34:37+00:00</published>
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<content type='text'>
The masks for various bit defines of LSDMR are common and thus we can
define them in one place rather than replicating them in each config.h

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
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<pre>
The masks for various bit defines of LSDMR are common and thus we can
define them in one place rather than replicating them in each config.h

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>85xx: Handle eLBC difference w/36-bit physical</title>
<updated>2009-01-23T23:08:28+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2009-01-23T20:22:13+00:00</published>
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<content type='text'>
The eLBC only handles 32-bit physical address in systems with 36-bit
physical.  The previos generation of LBC handled 34-bit physical
address in 36-bit systems.  Added a new CONFIG option to convey
the difference between the LBC and eLBC.

Also added defines for XAM bits used in LBC for the extended 34-bit
support.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
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<pre>
The eLBC only handles 32-bit physical address in systems with 36-bit
physical.  The previos generation of LBC handled 34-bit physical
address in 36-bit systems.  Added a new CONFIG option to convey
the difference between the LBC and eLBC.

Also added defines for XAM bits used in LBC for the extended 34-bit
support.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc8xxx: LCRR[CLKDIV] is sometimes five bits</title>
<updated>2008-12-20T00:20:25+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a5d212a263c58cc746481bf1fc878510533ce7d6'/>
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<content type='text'>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
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<pre>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>FSL: Moved BR_PHYS_ADDR for localbus to common header</title>
<updated>2008-12-04T09:15:43+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-11-24T16:25:14+00:00</published>
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<id>ea154a1781135d822eedee7567cc156089eae93c</id>
<content type='text'>
The BR_PHYS_ADDR macro is useful on all machines that have local bus
which is pretty much all 83xx/85xx/86xx chips.

Additionally most 85xx &amp; 86xx will need it if they want to support
36-bit physical addresses.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
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<pre>
The BR_PHYS_ADDR macro is useful on all machines that have local bus
which is pretty much all 83xx/85xx/86xx chips.

Additionally most 85xx &amp; 86xx will need it if they want to support
36-bit physical addresses.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Make Freescale local bus registers available for both 83xx and 85xx.</title>
<updated>2008-10-29T16:12:53+00:00</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2008-10-29T15:05:55+00:00</published>
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<id>4e190b03aaf2309bd2e025d1187a2ca880fedc95</id>
<content type='text'>
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin &lt;Jason.Jin@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin &lt;Jason.Jin@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Fix merge problems</title>
<updated>2008-08-06T12:05:38+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2008-08-06T12:05:38+00:00</published>
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<id>f2302d4430e7f3f48308d6a585320fe96af8afbd</id>
<content type='text'>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
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</content>
</entry>
<entry>
<title>Added the upmconfig() function for 85xx.</title>
<updated>2008-06-11T05:29:29+00:00</updated>
<author>
<name>Sergei Poselenov</name>
<email>sposelenov@emcraft.com</email>
</author>
<published>2008-06-06T13:42:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=740280e68ccc0b971e613face7eaaa8bd1382b8c'/>
<id>740280e68ccc0b971e613face7eaaa8bd1382b8c</id>
<content type='text'>
Signed-off-by: Sergei Poselenov &lt;sposelenov@emcraft.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
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<pre>
Signed-off-by: Sergei Poselenov &lt;sposelenov@emcraft.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>83xx/85xx/86xx: add more MxMR local bus definitions</title>
<updated>2008-06-10T23:22:26+00:00</updated>
<author>
<name>Wolfgang Grandegger</name>
<email>wg@grandegger.com</email>
</author>
<published>2008-06-02T10:09:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6fab2fe72ca5bf95280cd52cdf378af3e506eb50'/>
<id>6fab2fe72ca5bf95280cd52cdf378af3e506eb50</id>
<content type='text'>
83xx/85xx/86xx: add more MxMR local bus definitions

This patch adds more macro definitions for the UPM Machine Mode Registers
They are copied from "include/mpc82xx.h" to simplify the merge of all 8xxx
common local bus definitions into include/asm-ppc/fsl_lbc.h. They are
required for my forthcoming FSL NAND UPM driver re-write and the support
for the TQM8548 module.

This patch is based on the following two patches from Anton Vorontsov:

http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06511.html
http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06587.html

I leave coding style violation fixes, code beautification and name
corrections to somebody else ;-(.

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
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<pre>
83xx/85xx/86xx: add more MxMR local bus definitions

This patch adds more macro definitions for the UPM Machine Mode Registers
They are copied from "include/mpc82xx.h" to simplify the merge of all 8xxx
common local bus definitions into include/asm-ppc/fsl_lbc.h. They are
required for my forthcoming FSL NAND UPM driver re-write and the support
for the TQM8548 module.

This patch is based on the following two patches from Anton Vorontsov:

http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06511.html
http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06587.html

I leave coding style violation fixes, code beautification and name
corrections to somebody else ;-(.

Signed-off-by: Wolfgang Grandegger &lt;wg@grandegger.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>83xx/85xx: further localbus cleanups</title>
<updated>2008-06-10T23:22:25+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-05-29T14:14:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c8c5fc266e4499e283c293ccb972863156aa4134'/>
<id>c8c5fc266e4499e283c293ccb972863156aa4134</id>
<content type='text'>
Merge mpc85xx.h's LBC defines to fsl_lbc.h. Also, adopt ACS names
from mpc85xx.h, so ACS_0b10 renamed to ACS_DIV4, ACS_0b11 to ACS_DIV2.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
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<pre>
Merge mpc85xx.h's LBC defines to fsl_lbc.h. Also, adopt ACS names
from mpc85xx.h, so ACS_0b10 renamed to ACS_DIV4, ACS_0b11 to ACS_DIV2.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>83xx/85xx/86xx: factor out Freescale Localbus defines out of mpc83xx.h</title>
<updated>2008-06-10T23:22:25+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-05-28T14:20:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=42dbd667c88d496882d53e22656e89b654205492'/>
<id>42dbd667c88d496882d53e22656e89b654205492</id>
<content type='text'>
This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
use it on MPC85xx and MPC86xx processors.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
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<pre>
This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
use it on MPC85xx and MPC86xx processors.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
</pre>
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</content>
</entry>
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