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<title>u-boot.git/include/asm-ppc, branch v2009.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>mpc8[56]xx: Put localbus clock in sysinfo and gd</title>
<updated>2008-12-20T00:32:49+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28'/>
<id>ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28</id>
<content type='text'>
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.

This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.

The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.

get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.

checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
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<pre>
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.

This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.

The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.

get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.

checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>mpc8xxx: LCRR[CLKDIV] is sometimes five bits</title>
<updated>2008-12-20T00:20:25+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:34+00:00</published>
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<content type='text'>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
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<pre>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc: Use addrmap in virt_to_phys and map_physmem.</title>
<updated>2008-12-20T00:20:08+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-12-16T20:59:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=77c8115b1f1871811633eae77a5a700fac1f0e50'/>
<id>77c8115b1f1871811633eae77a5a700fac1f0e50</id>
<content type='text'>
If we have addr map support enabled use the mapping functions to
implement virt_to_phys() and map_physmem().

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
If we have addr map support enabled use the mapping functions to
implement virt_to_phys() and map_physmem().

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>85xx: Add support to populate addr map based on TLB settings</title>
<updated>2008-12-20T00:20:08+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-12-16T20:59:20+00:00</published>
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<content type='text'>
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powerpc: fix io.h build warning with CONFIG_PHYS_64BIT</title>
<updated>2008-12-16T15:54:41+00:00</updated>
<author>
<name>Becky Bruce</name>
<email>beckyb@kernel.crashing.org</email>
</author>
<published>2008-12-04T05:04:37+00:00</published>
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<id>b1ffecec37b57a59c139042267faac458e5324e9</id>
<content type='text'>
Casting a pointer to a phys_addr_t when it's an unsigned long long
on a 32-bit system without first casting to a non-pointer type
generates a compiler warning. Fix this.

Signed-off-by: Becky Bruce &lt;beckyb@kernel.crashing.org&gt;
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<pre>
Casting a pointer to a phys_addr_t when it's an unsigned long long
on a 32-bit system without first casting to a non-pointer type
generates a compiler warning. Fix this.

Signed-off-by: Becky Bruce &lt;beckyb@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Introduce virt_to_phys()</title>
<updated>2008-12-15T21:04:29+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-12-13T23:20:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=65e43a10631537dcb92c302d36301a12308216c3'/>
<id>65e43a10631537dcb92c302d36301a12308216c3</id>
<content type='text'>
virt_to_phys() returns the physical address given a virtual. In most
cases this will be just the input value as the vast majority of
systems run in a 1:1 mode.

However in systems that are not running this way it should report the
physical address or ~0 if no mapping exists for the given virtual
address.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
virt_to_phys() returns the physical address given a virtual. In most
cases this will be just the input value as the vast majority of
systems run in a 1:1 mode.

However in systems that are not running this way it should report the
physical address or ~0 if no mapping exists for the given virtual
address.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>FSL: Moved BR_PHYS_ADDR for localbus to common header</title>
<updated>2008-12-04T09:15:43+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-11-24T16:25:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ea154a1781135d822eedee7567cc156089eae93c'/>
<id>ea154a1781135d822eedee7567cc156089eae93c</id>
<content type='text'>
The BR_PHYS_ADDR macro is useful on all machines that have local bus
which is pretty much all 83xx/85xx/86xx chips.

Additionally most 85xx &amp; 86xx will need it if they want to support
36-bit physical addresses.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
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<pre>
The BR_PHYS_ADDR macro is useful on all machines that have local bus
which is pretty much all 83xx/85xx/86xx chips.

Additionally most 85xx &amp; 86xx will need it if they want to support
36-bit physical addresses.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>85xx: Add PORDEVSR_PCI1 define</title>
<updated>2008-12-04T09:15:43+00:00</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2008-12-01T19:47:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9427ccde0355a2ebf47454e8e1be59f5b9864e08'/>
<id>9427ccde0355a2ebf47454e8e1be59f5b9864e08</id>
<content type='text'>
Add define used to determine if PCI1 interface is in PCI or PCIX mode.

Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
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<pre>
Add define used to determine if PCI1 interface is in PCI or PCIX mode.

Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs</title>
<updated>2008-11-21T09:52:33+00:00</updated>
<author>
<name>Dave Mitchell</name>
<email>dmitch71@gmail.com</email>
</author>
<published>2008-11-20T20:00:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b14ca4b61a681f75f3125676e09d7ce6af66e927'/>
<id>b14ca4b61a681f75f3125676e09d7ce6af66e927</id>
<content type='text'>
Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
L2 cache DCRs from ppc440.h to this new header.

Also converted these DCR defines from lowercase to uppercase and
modified referencing modules to use them.

Signed-off-by: Dave Mitchell &lt;dmitch71@gmail.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
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<pre>
Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
L2 cache DCRs from ppc440.h to this new header.

Also converted these DCR defines from lowercase to uppercase and
modified referencing modules to use them.

Signed-off-by: Dave Mitchell &lt;dmitch71@gmail.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Make Freescale local bus registers available for both 83xx and 85xx.</title>
<updated>2008-10-29T16:12:53+00:00</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2008-10-29T15:05:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4e190b03aaf2309bd2e025d1187a2ca880fedc95'/>
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<content type='text'>
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin &lt;Jason.Jin@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin &lt;Jason.Jin@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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