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<title>u-boot.git/include/configs/coreboot.h, branch v2013.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>x86: coreboot: Enable io command</title>
<updated>2012-12-26T18:36:25+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-12-14T13:05:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a08afb398b204103b0f315cc671ee6a2384fff8e'/>
<id>a08afb398b204103b0f315cc671ee6a2384fff8e</id>
<content type='text'>
Enable the io command for x86 on coreboot.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Enable the io command for x86 on coreboot.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Fix coreboot config to boot on Chromebook</title>
<updated>2012-12-06T22:30:45+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-12-05T15:11:27+00:00</published>
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<id>ac426b7290e3a96c97fbc093f15cd0660e0edaf2</id>
<content type='text'>
The config is current broken. It compiles but does not boot because IDE is
enabled. Remove all IDE options, and enable SCSI instead.

Also add a working boot command and Linux bootargs, and enable command
line editing to make it easier to work with.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
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<pre>
The config is current broken. It compiles but does not boot because IDE is
enabled. Remove all IDE options, and enable SCSI instead.

Also add a working boot command and Linux bootargs, and enable command
line editing to make it easier to work with.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Turn on support for EFI's GPT in the coreboot config</title>
<updated>2012-12-06T22:30:44+00:00</updated>
<author>
<name>Gabe Black</name>
<email>gabeblack@chromium.org</email>
</author>
<published>2012-12-05T15:10:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d954a431ec4bbebc588ac810a1eb01f3512249a8'/>
<id>d954a431ec4bbebc588ac810a1eb01f3512249a8</id>
<content type='text'>
This allows u-boot to figure out the partitions of a chrome-os install.

Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This allows u-boot to figure out the partitions of a chrome-os install.

Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: coreboot: Enable video display</title>
<updated>2012-12-06T22:30:44+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-11-03T11:41:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cbca883c46146e9b3128fcb51ab750089c47c241'/>
<id>cbca883c46146e9b3128fcb51ab750089c47c241</id>
<content type='text'>
Enable the display on coreboot, using CFB.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable the display on coreboot, using CFB.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Emit port 80 post codes in show_boot_progress()</title>
<updated>2012-12-06T22:30:43+00:00</updated>
<author>
<name>Stefan Reinauer</name>
<email>reinauer@chromium.org</email>
</author>
<published>2012-12-03T13:58:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=300081aa68d705ce954c516751a9c03efa1fba5e'/>
<id>300081aa68d705ce954c516751a9c03efa1fba5e</id>
<content type='text'>
This helps us monitor boot progress and determine where U-Boot dies if
there are any problems.

Signed-off-by: Stefan Reinauer &lt;reinauer@google.com&gt;

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This helps us monitor boot progress and determine where U-Boot dies if
there are any problems.

Signed-off-by: Stefan Reinauer &lt;reinauer@google.com&gt;

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Enable CONFIG_CMD_ZBOOT for coreboot</title>
<updated>2012-12-06T22:30:40+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-12-02T04:49:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=34d6057be1a162ce6424314026af12f8963f2df2'/>
<id>34d6057be1a162ce6424314026af12f8963f2df2</id>
<content type='text'>
Enable this option to support booting a zImage.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable this option to support booting a zImage.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Enable ICH6 GPIO controller for coreboot</title>
<updated>2012-12-06T22:30:38+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-12-02T03:44:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a7e6d5496c7981803482bfa6970eeda2954d3458'/>
<id>a7e6d5496c7981803482bfa6970eeda2954d3458</id>
<content type='text'>
Coreboot uses this controller to implement GPIO access.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Coreboot uses this controller to implement GPIO access.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Define CONFIG_SYS_VSNPRINTF for coreboot</title>
<updated>2012-11-30T21:44:05+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-10-20T12:33:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a78d49473c81b8c95adfe684e62e5af6aa4f902d'/>
<id>a78d49473c81b8c95adfe684e62e5af6aa4f902d</id>
<content type='text'>
This option protects the printf() functions from overflow.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This option protects the printf() functions from overflow.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Select stdio devices for coreboot</title>
<updated>2012-11-30T21:44:03+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-11-29T09:58:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=420a2ca73f5805be5e69d01cfe60a06fba8c9754'/>
<id>420a2ca73f5805be5e69d01cfe60a06fba8c9754</id>
<content type='text'>
We want to support VGA, serial, USB keyboard and the Coreboot memory
console buffer.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We want to support VGA, serial, USB keyboard and the Coreboot memory
console buffer.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: coreboot: Enable LPC TPM</title>
<updated>2012-11-28T19:40:05+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2012-11-25T20:12:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d02a568e9aa3c3500d9b680f60782c192fd51691'/>
<id>d02a568e9aa3c3500d9b680f60782c192fd51691</id>
<content type='text'>
Coreboot boards have an LPC TPM connected, so enable this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Coreboot boards have an LPC TPM connected, so enable this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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