u-boot.git/include/configs/coreboot.h, branch v2015.01-rc3Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/include/configs/coreboot.h?h=v2015.01-rc32014-11-21T06:24:12Zx86: config: Move common x86 configs to a common file2014-11-21T06:24:12ZSimon Glasssjg@chromium.org2014-11-11T01:00:23Zurn:sha1:880a3cc4381ac0e2e39ce3313e267fb3e297bc3f
Many of the x86 CONFIG options will be common across different boards. Move
them to a common file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: config: Increase CONFIG_SYS_BOOTM_LEN to 16MB2014-10-29T19:11:54ZSimon Glasssjg@chromium.org2014-10-10T14:22:01Zurn:sha1:026090e4c51e00841b04abf58f48cc3a45654bc4
The code density of x86_64 is not wonderful. Increase the maximum boot
size and adjust the load address to cope.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Display basic CPU information on boot2014-10-29T02:42:56ZSimon Glasssjg@chromium.org2014-10-10T14:21:54Zurn:sha1:92cc94a1fe8e7a3ec78e993ea1ff1dd0bbaa5c36
Display the type of CPU (x86 or x86_64) when starting up.
Signed-off-by: Simon Glass <sjg@chromium.org>
dm: x86: Convert coreboot serial to use driver model2014-10-24T01:45:45ZSimon Glasssjg@chromium.org2014-10-10T13:49:20Zurn:sha1:e98a03ca68ca0edd08c260126aacc8c0f550804a
This makes use of the existing device tree node to use driver model
for the serial console.
Signed-off-by: Simon Glass <sjg@chromium.org>
dm: x86: Convert Intel ICH6 GPIO driver to use driver model2014-10-24T01:45:28ZSimon Glasssjg@chromium.org2014-10-10T13:49:18Zurn:sha1:7414112d70727e90be680e77dcb8a31394255ca8
Convert over this driver, using device tree to pass in the required
information. The peripheral is still probed, just the number of GPIO banks
and their offsets is in the device tree (previously this was a table in
the driver).
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Enable FIT, ELF on coreboot2014-10-23T03:50:33ZSimon Glasssjg@chromium.org2014-10-10T13:30:20Zurn:sha1:c0561d14c5c0adb57bc84f071225a8e742c9a30b
Enable FIT support and the bootelf command. Also change the default load
address to somewhere other than the normal load address of the kernel,
to allow for decompression without overwriting the original file.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: config: link: Display the board model on the screen2014-10-23T03:50:33ZSimon Glasssjg@chromium.org2014-10-10T13:30:19Zurn:sha1:c67161c1f1965efc5934697f5947cf65a2ea0a62
To get a display in U-Boot on link you must either build a coreboot that
always sets it up, or use Esc-Refresh-Power to reset the machine.
When we do have a display, it is nice to display the model at the top, so
enable this option.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: link: Tidy up the command lines options2014-10-23T03:50:33ZSimon Glasssjg@chromium.org2014-10-10T13:30:18Zurn:sha1:39c0b633c010b5c4dcb35b9bb73152a1b6f43ae2
We may as well use hush. The auto-complete option was incorrect so this was
not enabled. Also expand the command line size a little and go back to the
default prompt since "boot>" doesn't seem any more useful.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: cros_ec: Enable cros_ec for link2014-10-23T03:50:33ZSimon Glasssjg@chromium.org2014-10-10T13:30:16Zurn:sha1:14db950945cfd8dd05c60476696be08425acdc5a
Add defines to enable the Chrome OS EC interface and set it up on init.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: config: Enable dhcp on link2014-10-23T03:50:32ZSimon Glasssjg@chromium.org2014-10-10T13:30:12Zurn:sha1:2d41046531fb2421f2dd3f43a16f3d2f6484dad2
The dhcp option is required to get bootp to work on the Chromebook Pixel,
so enable it.
Signed-off-by: Simon Glass <sjg@chromium.org>