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<title>u-boot.git/include/configs/coreboot.h, branch v2018.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>x86: coreboot: Add generic coreboot payload support</title>
<updated>2018-08-20T05:52:06+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-08-10T09:39:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ceeee8f7b5f10d7736840b169249e891da0f6a47'/>
<id>ceeee8f7b5f10d7736840b169249e891da0f6a47</id>
<content type='text'>
Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.

But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.

But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Remove include/configs/coreboot.h</title>
<updated>2015-01-13T15:25:04+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-01-06T14:14:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fa48e51013280396f02e668a5d9f1d606d69be35'/>
<id>fa48e51013280396f02e668a5d9f1d606d69be35</id>
<content type='text'>
Since we already swtiched to use the new mechanism for building
U-Boot for coreboot, coreboot.h is no longer needed so remove it.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
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<pre>
Since we already swtiched to use the new mechanism for building
U-Boot for coreboot, coreboot.h is no longer needed so remove it.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: coreboot: Move coreboot-specific defines from coreboot.h to Kconfig</title>
<updated>2015-01-13T15:25:03+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-01-06T14:14:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9d74f03460a788e004fb1fb4cb53003d26f57298'/>
<id>9d74f03460a788e004fb1fb4cb53003d26f57298</id>
<content type='text'>
There are many places in the U-Boot source tree which refer to
CONFIG_SYS_COREBOOT, CONFIG_CBMEM_CONSOLE and CONFIG_VIDEO_COREBOOT
that is currently defined in coreboot.h.

Move them to arch/x86/cpu/coreboot/Kconfig so that we can switch
to board configuration file to build U-Boot later.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are many places in the U-Boot source tree which refer to
CONFIG_SYS_COREBOOT, CONFIG_CBMEM_CONSOLE and CONFIG_VIDEO_COREBOOT
that is currently defined in coreboot.h.

Move them to arch/x86/cpu/coreboot/Kconfig so that we can switch
to board configuration file to build U-Boot later.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Rename coreboot-serial to x86-serial</title>
<updated>2014-12-19T00:26:08+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2014-12-17T07:50:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=41702bac01c585cc11fa5dd1f38dea1e5a7c642d'/>
<id>41702bac01c585cc11fa5dd1f38dea1e5a7c642d</id>
<content type='text'>
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: config: Move common x86 configs to a common file</title>
<updated>2014-11-21T06:24:12+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-11T01:00:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=880a3cc4381ac0e2e39ce3313e267fb3e297bc3f'/>
<id>880a3cc4381ac0e2e39ce3313e267fb3e297bc3f</id>
<content type='text'>
Many of the x86 CONFIG options will be common across different boards. Move
them to a common file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Many of the x86 CONFIG options will be common across different boards. Move
them to a common file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: config: Increase CONFIG_SYS_BOOTM_LEN to 16MB</title>
<updated>2014-10-29T19:11:54+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-10T14:22:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=026090e4c51e00841b04abf58f48cc3a45654bc4'/>
<id>026090e4c51e00841b04abf58f48cc3a45654bc4</id>
<content type='text'>
The code density of x86_64 is not wonderful. Increase the maximum boot
size and adjust the load address to cope.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The code density of x86_64 is not wonderful. Increase the maximum boot
size and adjust the load address to cope.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Display basic CPU information on boot</title>
<updated>2014-10-29T02:42:56+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-10T14:21:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=92cc94a1fe8e7a3ec78e993ea1ff1dd0bbaa5c36'/>
<id>92cc94a1fe8e7a3ec78e993ea1ff1dd0bbaa5c36</id>
<content type='text'>
Display the type of CPU (x86 or x86_64) when starting up.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Display the type of CPU (x86 or x86_64) when starting up.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: x86: Convert coreboot serial to use driver model</title>
<updated>2014-10-24T01:45:45+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-10T13:49:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e98a03ca68ca0edd08c260126aacc8c0f550804a'/>
<id>e98a03ca68ca0edd08c260126aacc8c0f550804a</id>
<content type='text'>
This makes use of the existing device tree node to use driver model
for the serial console.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This makes use of the existing device tree node to use driver model
for the serial console.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: x86: Convert Intel ICH6 GPIO driver to use driver model</title>
<updated>2014-10-24T01:45:28+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-10T13:49:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7414112d70727e90be680e77dcb8a31394255ca8'/>
<id>7414112d70727e90be680e77dcb8a31394255ca8</id>
<content type='text'>
Convert over this driver, using device tree to pass in the required
information. The peripheral is still probed, just the number of GPIO banks
and their offsets is in the device tree (previously this was a table in
the driver).

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert over this driver, using device tree to pass in the required
information. The peripheral is still probed, just the number of GPIO banks
and their offsets is in the device tree (previously this was a table in
the driver).

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Enable FIT, ELF on coreboot</title>
<updated>2014-10-23T03:50:33+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-10T13:30:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c0561d14c5c0adb57bc84f071225a8e742c9a30b'/>
<id>c0561d14c5c0adb57bc84f071225a8e742c9a30b</id>
<content type='text'>
Enable FIT support and the bootelf command. Also change the default load
address to somewhere other than the normal load address of the kernel,
to allow for decompression without overwriting the original file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable FIT support and the bootelf command. Also change the default load
address to somewhere other than the normal load address of the kernel,
to allow for decompression without overwriting the original file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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