u-boot.git/include/configs/sequoia.h, branch v2009.11

ppc4xx: Sequoia: Add chip_config command

2009-10-23T14:05:11+00:00

This patch removes the Sequoia "bootstrap" command and replaces it
with the now common command "chip_config".

Please note that the patches with the dynamic PCI sync clock
configuration have to be applied, before this one should go in.
This is because Sequoia has 2 different bootstrap EEPROMs, and
the old bootstrap command configured different values depending
on the detected PCI async clock (33 vs. 66MHz). With the PCI sync
clock patches, this is not necessary anymore. The PCI sync clock
will be configured correctly on-the-fly now.

Signed-off-by: Stefan Roese

ppc4xx: Add Sequoia RAM-booting target

2009-06-12T18:39:47+00:00

This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").

Here the commands to load and start this image from the BDI2000:

440EPX>reset halt
440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX>go 0x1000000

Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.

Signed-off-by: Stefan Roese

ppc4xx: Disable POST memory test on NAND-booting Sequoia

2009-04-16T07:12:08+00:00

Don't run the memory POST on the NAND-booting version. It will
overwrite part of the U-Boot image which is already loaded from NAND
to SDRAM. We were just lucky that it booted at all with this SDRAM
test enabled.

Signed-off-by: Stefan Roese

NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS

2009-01-23T16:32:51+00:00

This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
changes the default from 8 to 1 for the legacy and the new MTD
NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
in the board config files because none of the boards use multi
chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
define

 #define NAND_MAX_CHIPS          CONFIG_SYS_MAX_NAND_DEVICE

but that's bogus and did not work anyhow.

Signed-off-by: Wolfgang Grandegger 
Signed-off-by: Scott Wood

rename CFG_ macros to CONFIG_SYS

2008-10-18T19:54:03+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE references

2008-10-14T12:45:31+00:00

Signed-off-by: Peter Tyser

rename CFG_ENV macros to CONFIG_ENV

2008-09-10T20:48:06+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH

2008-09-10T20:48:04+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

rename CFG_ENV_IS_IN_NAND in CONFIG_ENV_IS_IN_NAND

2008-09-10T20:47:58+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

ppc4xx: Increase image size for NAND boot target

2008-08-30T09:24:44+00:00

This is needed since now with HUSH enabled (amcc-common.h) the image
read from NAND exceeds the previous limit.

Signed-off-by: Stefan Roese