u-boot.git/include/configs, branch v2010.06-rc1 Unnamed repository; edit this file 'description' to name the repository. Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-05-21T20:22:23+00:00 Wolfgang Denk wd@denx.de 2010-05-21T20:22:23+00:00 8a452c2c17bc284e3f91b8ed4aec9d2b9b342df7 






MX31: Added support for the Casio COM57H5M10XRC to QONG
2010-05-19T07:15:50+00:00

Stefano Babic
sbabic@denx.de

2010-05-13T08:26:40+00:00

03af5abd85637d27e96fb999ce6e3992293570b0

The patch adds setup to connect a CASIO COM57H5M10XRC
(640x480 TFT display) to the QONG module.

Signed-off-by: Stefano Babic <sbabic@denx.de>





The patch adds setup to connect a CASIO COM57H5M10XRC
(640x480 TFT display) to the QONG module.

Signed-off-by: Stefano Babic <sbabic@denx.de>







Fix SICRL setting in SIMPC8313
2010-05-17T19:44:25+00:00

Ron Madrid
ron_madrid@sbcglobal.net

2010-05-14T23:27:48+00:00

b1e1a42bb1ea2f0ddaaea7f4c9d67c98ab38709e

This patch sets the SICRL_LBC bits in SICRL to change the function of the
associated pins to GPIO functionality.

Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>





This patch sets the SICRL_LBC bits in SICRL to change the function of the
associated pins to GPIO functionality.

Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>







mpc83xx/mvBLM7: add usb commands and cleanup.
2010-05-07T17:20:15+00:00

Andre Schwarz
andre.schwarz@matrix-vision.de

2010-05-03T11:22:31+00:00

fd194f82d1c30802f0597a3e359fdc03ed397367

Add USB commands.
Rename autoscript to bootscript.
Add automatic bootscript image generation to makefile.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>





Add USB commands.
Rename autoscript to bootscript.
Add automatic bootscript image generation to makefile.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>







mpc83xx: Add UPMA configuration to SIMPC8313
2010-05-07T17:19:52+00:00

Ron Madrid
ron_madrid@sbcglobal.net

2010-04-28T23:04:43+00:00

3b439792b0781921c599d8af9bed6a771d295b53

Added UPM array table, upmconfig, and Local Bus configuration support for SIMPC8313

Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>





Added UPM array table, upmconfig, and Local Bus configuration support for SIMPC8313

Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>







74xx_7xx: CPCI750: Add ECC support on esd CPCI-CPU/750 board
2010-05-05T22:22:53+00:00

Reinhard Arlt
reinhard.arlt@esd.eu

2010-04-13T07:59:09+00:00

0738e24e2c1d95bb94455d44485dc5d7b9c9d707

Add ECC support for DDR RAM for MV64360 on esd CPCI-CPU/750 board.

This patch also adds the "pldver" command to display the CPLD
revision.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>





Add ECC support for DDR RAM for MV64360 on esd CPCI-CPU/750 board.

This patch also adds the "pldver" command to display the CPLD
revision.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>







eNET: Implement eNET Watchdog
2010-05-05T22:20:04+00:00

Graeme Russ
graeme.russ@gmail.com

2010-04-23T14:05:58+00:00

880c59e5add3681bd4dca14d2fd20152bee7ad14

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>





Signed-off-by: Graeme Russ <graeme.russ@gmail.com>







eNET: Use SC520 MMCR to reset eNET board
2010-05-05T22:19:46+00:00

Graeme Russ
graeme.russ@gmail.com

2010-04-23T14:05:57+00:00

f2a55055e9b19f3eba9de97ff454cf8bfef25468

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>





Signed-off-by: Graeme Russ <graeme.russ@gmail.com>







eNET: Add support for onboard RTL8100B (RTL8139) chips
2010-05-05T22:19:12+00:00

Graeme Russ
graeme.russ@gmail.com

2010-04-23T14:05:55+00:00

8fd805632f95e5e834f312a51aa969bf1d99c41b

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>





Signed-off-by: Graeme Russ <graeme.russ@gmail.com>







eNET: Fix CONFIG_SYS_HZ to be 1000
2010-05-05T22:18:25+00:00

Graeme Russ
graeme.russ@gmail.com

2010-04-23T14:05:52+00:00

4f197c30e5cb3005909402b7fc630cb092eef02f

The clock interupt has always been 1kHz as per timer_init() in
/arch/i386/cpu/sc520/sc520_timer.c

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>





The clock interupt has always been 1kHz as per timer_init() in
/arch/i386/cpu/sc520/sc520_timer.c

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>