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<title>u-boot.git/include/configs, branch v2017.09-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>common: Move CONFIG_BOOTARGS to Kconfig</title>
<updated>2017-08-14T21:06:06+00:00</updated>
<author>
<name>Sam Protsenko</name>
<email>semen.protsenko@linaro.org</email>
</author>
<published>2017-08-14T17:22:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5abc1a4523a5509ce37bc3ec818b660a48f4eafd'/>
<id>5abc1a4523a5509ce37bc3ec818b660a48f4eafd</id>
<content type='text'>
Also introduce CONFIG_USE_BOOTARGS option so we can control if
CONFIG_BOOTARGS defined at all.

Signed-off-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
[trini: Resync r8a779[56]_ulcb, various ls10xx targets]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
Also introduce CONFIG_USE_BOOTARGS option so we can control if
CONFIG_BOOTARGS defined at all.

Signed-off-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
[trini: Resync r8a779[56]_ulcb, various ls10xx targets]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: rockchip: rock: Correct test to use CONFIG_IS_ENABLED not defined</title>
<updated>2017-08-14T17:33:07+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-08-14T17:21:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aa6aaf93211b7e22361e75f1068e1e565e731f25'/>
<id>aa6aaf93211b7e22361e75f1068e1e565e731f25</id>
<content type='text'>
While it is likely that this entire case is superfluous and can be
removed, correct the test now to match what is in rockchip-common.h and
makes sense based on context of the code.  Otherwise we get a large
number of warnings.

Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
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<pre>
While it is likely that this entire case is superfluous and can be
removed, correct the test now to match what is in rockchip-common.h and
makes sense based on context of the code.  Otherwise we get a large
number of warnings.

Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-rockchip</title>
<updated>2017-08-14T14:40:01+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-08-14T14:40:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c1b62ba9ca0e41fdd548cb3bb9af3b3f90d4a393'/>
<id>c1b62ba9ca0e41fdd548cb3bb9af3b3f90d4a393</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>Convert CONFIG_OMAP3_SPI to Kconfig</title>
<updated>2017-08-13T19:17:10+00:00</updated>
<author>
<name>Adam Ford</name>
<email>aford173@gmail.com</email>
</author>
<published>2017-07-27T03:25:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ebb3e43de4cf85e56c6ce6b3c6be98f654acfb19'/>
<id>ebb3e43de4cf85e56c6ce6b3c6be98f654acfb19</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_OMAP3_SPI

Signed-off-by: Adam Ford &lt;aford173@gmail.com&gt;
[trini: Minor comment tweaks]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This converts the following to Kconfig:
   CONFIG_OMAP3_SPI

Signed-off-by: Adam Ford &lt;aford173@gmail.com&gt;
[trini: Minor comment tweaks]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spl: moveconfig: remove SPL_LDSCRIPT definitions for header-files</title>
<updated>2017-08-13T15:15:08+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-08-04T12:01:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0ee89f2daf94454bb8237bbfbdb6b0d8eed84481'/>
<id>0ee89f2daf94454bb8237bbfbdb6b0d8eed84481</id>
<content type='text'>
With the hierarchical defaults set up, we remove these from the header
files.  To do so, I've run moveconfig on SPL_LDSCRIPT and this commits
the changes.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With the hierarchical defaults set up, we remove these from the header
files.  To do so, I've run moveconfig on SPL_LDSCRIPT and this commits
the changes.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE</title>
<updated>2017-08-13T15:12:35+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-07-28T18:20:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5aa49af3114972f62eb02ef0a6a2f0269c937f2d'/>
<id>5aa49af3114972f62eb02ef0a6a2f0269c937f2d</id>
<content type='text'>
We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the
whitelist (this time it's really happening!) and migrate the setting
(only used on the RK3368-uQ7 so far) into Kconfig.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the
whitelist (this time it's really happening!) and migrate the setting
(only used on the RK3368-uQ7 so far) into Kconfig.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368</title>
<updated>2017-08-13T15:12:34+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-08-02T19:26:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d9d1242b822025e99c60299a09f933dd6285ae74'/>
<id>d9d1242b822025e99c60299a09f933dd6285ae74</id>
<content type='text'>
Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our
header file.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our
header file.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: board: lion-rk3368: add support for the RK3368-uQ7</title>
<updated>2017-08-13T15:12:34+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-07-12T23:36:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4d02d2060514c10749f99160a3b91544ebd61204'/>
<id>4d02d2060514c10749f99160a3b91544ebd61204</id>
<content type='text'>
The RK3368-uQ7 (codenamed 'Lion') is a micro-Qseven (40mm x 70mm,
MXM-230 edge connector compatible with the Qseven specification)
form-factor system-on-module based on the octo-core Rockchip RK3368.
It is designed, supported and manufactured by Theobroma Systems.

It provides the following features:
 - 8x Cortex-A53 (in 2 clusters of 4 cores each)
 - (on-module) up to 4GB of DDR3 memory
 - (on-module) SPI-NOR flash
 - (on-module) eMMC
 - Gigabit Ethernet (with an on-module KSZ9031 PHY)
 - USB
 - HDMI
 - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group)
 - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...)

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The RK3368-uQ7 (codenamed 'Lion') is a micro-Qseven (40mm x 70mm,
MXM-230 edge connector compatible with the Qseven specification)
form-factor system-on-module based on the octo-core Rockchip RK3368.
It is designed, supported and manufactured by Theobroma Systems.

It provides the following features:
 - 8x Cortex-A53 (in 2 clusters of 4 cores each)
 - (on-module) up to 4GB of DDR3 memory
 - (on-module) SPI-NOR flash
 - (on-module) eMMC
 - Gigabit Ethernet (with an on-module KSZ9031 PHY)
 - USB
 - HDMI
 - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group)
 - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...)

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h</title>
<updated>2017-08-13T15:12:33+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-07-14T15:51:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1c78740285568bfc084a7f67cdddb130965c6938'/>
<id>1c78740285568bfc084a7f67cdddb130965c6938</id>
<content type='text'>
To build TPL and SPL stages for the RK3368, we will also need to
enable the SPL_FRAMEWORK.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To build TPL and SPL stages for the RK3368, we will also need to
enable the SPL_FRAMEWORK.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3368: spl: add memory layout for TPL and SPL</title>
<updated>2017-08-13T15:12:22+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-07-14T15:52:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c61177aa10a2925d1528554ed952052433b2f10e'/>
<id>c61177aa10a2925d1528554ed952052433b2f10e</id>
<content type='text'>
For the RK3368, we use a multi-stage boot-process consisting of the
following:
  1.  TPL: initalises DRAM, returns to boot-ROM (which then loads
           the next stage and transfers control to it)
  2.  SPL: a full-features SPL stage including OF_CONTROL and FIT
           image loading, which fetches the ATF, DTB and full U-Boot
	   and then transfers control to the ATF (using the BL31
	   parameter block to indicate the location of BL33/U-Boot)
  3.  ATF: sets up the secure world and exits to BL33 (i.e. a full
           U-Boot) in the normal world
  4.  full U-Boot

TPL/SPL and the full U-Boot are built from this tree and need to
run from distinct text addresses and with distinct initial stack
pointer addresses.

This commit sets up the configuration to run:
  -  TPL from the SRAM at 0xff8c0000 (note that the first 0x1000
     	 are reserved for use by the boot-ROM and contain the SP
	 when the TPL is entered)
  -  SPL from DRAM at 0x0
  -  U-Boot from DRAM at 0x200000

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For the RK3368, we use a multi-stage boot-process consisting of the
following:
  1.  TPL: initalises DRAM, returns to boot-ROM (which then loads
           the next stage and transfers control to it)
  2.  SPL: a full-features SPL stage including OF_CONTROL and FIT
           image loading, which fetches the ATF, DTB and full U-Boot
	   and then transfers control to the ATF (using the BL31
	   parameter block to indicate the location of BL33/U-Boot)
  3.  ATF: sets up the secure world and exits to BL33 (i.e. a full
           U-Boot) in the normal world
  4.  full U-Boot

TPL/SPL and the full U-Boot are built from this tree and need to
run from distinct text addresses and with distinct initial stack
pointer addresses.

This commit sets up the configuration to run:
  -  TPL from the SRAM at 0xff8c0000 (note that the first 0x1000
     	 are reserved for use by the boot-ROM and contain the SP
	 when the TPL is entered)
  -  SPL from DRAM at 0x0
  -  U-Boot from DRAM at 0x200000

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
