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<title>u-boot.git/include/configs, branch v2022.04-rc3</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/include/configs?h=v2022.04-rc3</id>
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<updated>2022-02-28T15:33:45Z</updated>
<entry>
<title>arm: apple: Switch to fully dynamic mem layout</title>
<updated>2022-02-28T15:33:45Z</updated>
<author>
<name>Janne Grunau</name>
<email>j@jannau.net</email>
</author>
<published>2022-02-19T13:05:19Z</published>
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<id>urn:sha1:6fb4f7387e17664e2e6cea1217fe9e95cc0a1170</id>
<content type='text'>
Support for Apple M1 Pro and Max will allow using a single binary for
all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM
start address is 0x100_0000_0000 instead of 0x8_0000_0000.
Replace the hardcoded memory layout with dynamic initialized
environment variables in board_late_init().

Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021).

Signed-off-by: Janne Grunau &lt;j@jannau.net&gt;
Reviewed-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2022-02-21T13:32:02Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-02-21T13:32:02Z</published>
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<id>urn:sha1:24b628a8f844868adca897aae40af6f98cdbc26d</id>
<content type='text'>
Xilinx changes for v2022.04-rc3

microblaze:
- Fix exception handler

zynqmp:
- Show information about secure images
- DT changes (som u-boot file removal)
- Fix zynqmp_pm_cfg_obj_convert.py
- Fix platform boot

xilinx:
- Fix bootm_size calculation
- Remove GPIO_EXTRA_HEADER selection

power:
- Add zynqmp power management driver

scsi:
- Add phy support to ceva driver

zynq qspi:
- Fix unaligned accesses and check baudrate setup
- Add support for spi memory operations

net:
- Fix 64bit calculation in axi_emac

video:
- Add missing gpio dependency for seps driver
</content>
</entry>
<entry>
<title>kontron-sl-mx8mm: change environment address variables</title>
<updated>2022-02-19T22:32:23Z</updated>
<author>
<name>Heiko Thiery</name>
<email>heiko.thiery@gmail.com</email>
</author>
<published>2022-02-16T12:25:14Z</published>
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<id>urn:sha1:891a32465d3b3c01f3374590500450604cd7d38a</id>
<content type='text'>
Currently the space between kernel_addr_r and the fdt_addr_r is only 32MB.
To have enought space to load kernel images bigger than 32MB change the
variables to a feasible value.

The new environment variables layout is based on the scheme from
"include/configs/ti_armv7_common.h".

The CONFIG_SYS_LOAD_ADDR value is set to 0x42000000. With that we have
the same value as for the kernel_addr_r.

Signed-off-by: Heiko Thiery &lt;heiko.thiery@gmail.com&gt;
Reviewed-by: Michael Walle &lt;michael@walle.cc&gt;
</content>
</entry>
<entry>
<title>colibri-imx6ull: improve env badblock management</title>
<updated>2022-02-19T22:32:22Z</updated>
<author>
<name>Francesco Dolcini</name>
<email>francesco.dolcini@toradex.com</email>
</author>
<published>2022-02-03T17:41:24Z</published>
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<id>urn:sha1:a1128944a10eb798ef3f16494e5fd3ddb8674d54</id>
<content type='text'>
Use the complete 512kb (4 blocks) nand partition reserved for u-boot
environment instead of just the first block, this allows the module to
have a working environment even if 3 blocks are bad.

Signed-off-by: Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;
Signed-off-by: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
</content>
</entry>
<entry>
<title>board: gateworks: venice: config file cleanups</title>
<updated>2022-02-19T13:46:54Z</updated>
<author>
<name>Tim Harvey</name>
<email>tharvey@gateworks.com</email>
</author>
<published>2022-02-11T18:52:06Z</published>
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<id>urn:sha1:10673ebb1f642f5d718e48367077c1137db98920</id>
<content type='text'>
Clean up config file:
 - remove unnecessary IMX_FEC_BASE
 - remove unnecessary comment
 - remove ipaddr/serverip from env

Signed-off-by: Tim Harvey &lt;tharvey@gateworks.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@gmail.com&gt;
</content>
</entry>
<entry>
<title>board: gateworks: venice: add imx8mn-gw7902 support</title>
<updated>2022-02-19T13:46:54Z</updated>
<author>
<name>Tim Harvey</name>
<email>tharvey@gateworks.com</email>
</author>
<published>2022-02-11T18:48:56Z</published>
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<id>urn:sha1:2cb156e126842be26d8d4d69c2652ae1097e5b9b</id>
<content type='text'>
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring:
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller
 - LTE CAT M1 modem
 - USB 2.0 HUB
 - M.2 Socket with USB2.0, PCIe, and dual-SIM
 - IMX8M FEC
 - PCIe based GbE
 - RS232/RS485/RS422 serial transceiver
 - GPS
 - CAN bus
 - WiFi / Bluetooth
 - MIPI header (DSI/CSI/GPIO/PWM/I2S)
 - PMIC

To add support for the i.MX8M Nano GW7902:
 - Add imx8mn-venice dts/defconfig/include
 - Add imx8mn-gw7902 dts
 - Add imx8mn-2gb lpddr4 dram configs
 - Add misc support for IMX8M Nano SoC
 - rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific
 - update README with differences for IMX8MN vs IMX8MM

Signed-off-by: Tim Harvey &lt;tharvey@gateworks.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@gmail.com&gt;
</content>
</entry>
<entry>
<title>arm: imx8m: add support for Advantech RSB-3720</title>
<updated>2022-02-19T13:46:54Z</updated>
<author>
<name>Ying-Chun Liu (PaulLiu)</name>
<email>paul.liu@linaro.org</email>
</author>
<published>2022-02-08T01:22:38Z</published>
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<id>urn:sha1:ddb56f371a76368002f78e677035382df0dbf25f</id>
<content type='text'>
Add initial support for Advantech RSB-3720 board.
The initial support includes:
 - MMC
 - eMMC
 - I2C
 - FEC
 - Serial console

Signed-off-by: Darren Huang &lt;darren.huang@advantech.com.tw&gt;
Signed-off-by: Kevin12.Chen &lt;Kevin12.Chen@advantech.com.tw&gt;
Signed-off-by: Phill.Liu &lt;Phill.Liu@advantech.com.tw&gt;
Signed-off-by: Tim Liang &lt;tim.liang@advantech.com.tw&gt;
Signed-off-by: wei.zeng &lt;wei.zeng@advantech.com.cn&gt;
Signed-off-by: Ying-Chun Liu (PaulLiu) &lt;paul.liu@linaro.org&gt;
Cc: uboot-imx &lt;uboot-imx@nxp.com&gt;
Cc: Peng Fan (OSS) &lt;peng.fan@oss.nxp.com&gt;
</content>
</entry>
<entry>
<title>include: configs: Update env for selecting right dtb</title>
<updated>2022-02-16T19:19:30Z</updated>
<author>
<name>Sinthu Raja</name>
<email>sinthu.raja@ti.com</email>
</author>
<published>2022-02-09T09:37:01Z</published>
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<id>urn:sha1:0ca9f7042327dffb76334273d82123c8efaea37d</id>
<content type='text'>
Now that single defconfig can be used for booting J721E EVM and
SK, default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.

Signed-off-by: Sinthu Raja &lt;sinthu.raja@ti.com&gt;
</content>
</entry>
<entry>
<title>microblaze: exception: migrate MICROBLAZE_V5 to Kconfig</title>
<updated>2022-02-15T12:11:43Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovidiu.panait@windriver.com</email>
</author>
<published>2022-02-13T08:09:20Z</published>
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<id>urn:sha1:1669b3d1a0b56178ec8123c48fbf6dabe46b23a4</id>
<content type='text'>
Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only
covers delay slot exception support.

Signed-off-by: Ovidiu Panait &lt;ovidiu.panait@windriver.com&gt;
Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>common: drop CONFIG_SYS_RESET_ADDR</title>
<updated>2022-02-10T21:44:23Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovidiu.panait@windriver.com</email>
</author>
<published>2022-01-31T07:20:22Z</published>
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<id>urn:sha1:1ca890d789b45ddcda73454fe2b54f5fdb10ee3b</id>
<content type='text'>
There are no boards that define CONFIG_SYS_RESET_ADDR, so drop the
remaining comments referencing it and also the config_whitelist.txt entry.

Signed-off-by: Ovidiu Panait &lt;ovidiu.panait@windriver.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Acked-by: thomas@wytron.com.tw
</content>
</entry>
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