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<title>u-boot.git/include/configs, branch v2025.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support</title>
<updated>2025-06-10T18:50:50+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-05-30T22:03:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=55c4a6db549cdad3f185e33f439d130cec7a6bc8'/>
<id>55c4a6db549cdad3f185e33f439d130cec7a6bc8</id>
<content type='text'>
Add Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0
(R8A779G3) SoC. This is a single-board computer with single gigabit ethernet,
DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports,
micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD,
debug UART and JTAG.

DT is imported from Linux next commit:
a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support")

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
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<pre>
Add Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0
(R8A779G3) SoC. This is a single-board computer with single gigabit ethernet,
DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports,
micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD,
debug UART and JTAG.

DT is imported from Linux next commit:
a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support")

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-master-20250522' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2025-05-22T14:41:25+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-05-22T14:41:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=df5dcf7b7eb66f74262c5e501f813aac759557f2'/>
<id>df5dcf7b7eb66f74262c5e501f813aac759557f2</id>
<content type='text'>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/26275

- Fix boot regression on imx8mn_bsh_smm_s2/s2pro.
- Fix reset on imx6ulz_smm_m2.
- Adjust DDR initialization on imx6ulz_smm_m2.
- Fix CAAM startup error.
</content>
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<pre>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/26275

- Fix boot regression on imx8mn_bsh_smm_s2/s2pro.
- Fix reset on imx6ulz_smm_m2.
- Adjust DDR initialization on imx6ulz_smm_m2.
- Fix CAAM startup error.
</pre>
</div>
</content>
</entry>
<entry>
<title>board: bsh: imx6ulz_smm_m2: Add support for 256 MiB DRAM</title>
<updated>2025-05-21T10:53:13+00:00</updated>
<author>
<name>Simon Holesch</name>
<email>simon.holesch@bshg.com</email>
</author>
<published>2025-05-21T09:47:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8c2987396ab13c4d4b75533e9a2b533b4f9ce3ea'/>
<id>8c2987396ab13c4d4b75533e9a2b533b4f9ce3ea</id>
<content type='text'>
Calibration values were calculated using the NXP tool
I.MX6ULL_DDR3_Script_Aid_V0.01.xlsx

Signed-off-by: Wolfgang Birkner &lt;wolfgang.birkner@bshg.com&gt;
Signed-off-by: Simon Holesch &lt;simon.holesch@bshg.com&gt;
Signed-off-by: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Signed-off-by: Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;
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<pre>
Calibration values were calculated using the NXP tool
I.MX6ULL_DDR3_Script_Aid_V0.01.xlsx

Signed-off-by: Wolfgang Birkner &lt;wolfgang.birkner@bshg.com&gt;
Signed-off-by: Simon Holesch &lt;simon.holesch@bshg.com&gt;
Signed-off-by: Michael Trimarchi &lt;michael@amarulasolutions.com&gt;
Signed-off-by: Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>configs: th1520_lpi4a: Add UART clock frequency</title>
<updated>2025-05-21T08:49:52+00:00</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-05-13T09:04:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=acf9384d8cc372fc71a5857363cfe10c240c497a'/>
<id>acf9384d8cc372fc71a5857363cfe10c240c497a</id>
<content type='text'>
The BROM of TH1520 always initializes UART0's parent clock and
configures the baudrate to 115200. Describe the clock frequency to make
UART function correctly in SPL without introducing CCF.

Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The BROM of TH1520 always initializes UART0's parent clock and
configures the baudrate to 115200. Describe the clock frequency to make
UART function correctly in SPL without introducing CCF.

Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>riscv: starfive: jh7110: move uart0 clock frequency to config header</title>
<updated>2025-05-21T08:49:35+00:00</updated>
<author>
<name>E Shattow</name>
<email>e@freeshell.de</email>
</author>
<published>2025-05-03T11:52:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=97833f4cf6f681a341e76771bbf42bc8f8611d82'/>
<id>97833f4cf6f681a341e76771bbf42bc8f8611d82</id>
<content type='text'>
Move unnecessary clock frequency assignment out of device-tree and into the
board config header so that the ns16550 serial driver can successfully init
during SPL after failing to resolve the parent clock from upstream dts. The
serial driver will then resolve clock frequency from device-tree node parent
clock at init during Main app as it is expected by upstream.

Signed-off-by: E Shattow &lt;e@freeshell.de&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move unnecessary clock frequency assignment out of device-tree and into the
board config header so that the ns16550 serial driver can successfully init
during SPL after failing to resolve the parent clock from upstream dts. The
serial driver will then resolve clock frequency from device-tree node parent
clock at init during Main app as it is expected by upstream.

Signed-off-by: E Shattow &lt;e@freeshell.de&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra</title>
<updated>2025-05-08T15:22:25+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-05-08T15:22:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ffd5d9cc2720f225fc6e8fa557cb3487965b7067'/>
<id>ffd5d9cc2720f225fc6e8fa557cb3487965b7067</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>ARM: tegra: convert boards to use TEGRA_PRAM</title>
<updated>2025-05-08T05:31:13+00:00</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2025-04-15T08:55:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=718740855325c3366ea95e420bf8b32f47b0aa9f'/>
<id>718740855325c3366ea95e420bf8b32f47b0aa9f</id>
<content type='text'>
Switch boards that use CFG_PRAM to TEGRA_PRAM.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
</content>
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<pre>
Switch boards that use CFG_PRAM to TEGRA_PRAM.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: tegra: add PRAM Kconfig option</title>
<updated>2025-05-08T05:31:12+00:00</updated>
<author>
<name>Svyatoslav Ryhel</name>
<email>clamor95@gmail.com</email>
</author>
<published>2025-04-15T08:54:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=94b395cc2db0160a079b208d9cc49485f2b943b1'/>
<id>94b395cc2db0160a079b208d9cc49485f2b943b1</id>
<content type='text'>
Wrap CFG_PRAM with Kconfig option.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Wrap CFG_PRAM with Kconfig option.

Signed-off-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS for px30 to rk3308/etc</title>
<updated>2025-05-06T09:59:12+00:00</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko.stuebner@cherry.de</email>
</author>
<published>2025-05-06T08:55:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2d6346d9017b4227faee765bddd232928195d10a'/>
<id>2d6346d9017b4227faee765bddd232928195d10a</id>
<content type='text'>
Loading a FIT image for kernel, initrd and rootfs on px30 can result in an
memory overlap, resulting in the not 100% helpful message of
"This will not be a case any time" from lmb_fix_over_lap_regions().

Adding a bit of debug info to lmb_fix_over_lap_regions() brings:
lmb_fix_over_lap_regions: base1 0x280000-0x6005ac &gt; base2 0x600000-0x6000d1

So this is because the FIT image gets loaded to the kernel_addr_r at
0x280000 while the pxe-file is already living at 0x600000, only 3.5MB
behind.

In commit 4acc8bb044a4 ("configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS
for rk3308, rk3328, and rk3399") FUKAUMI Naoki already brought the memory
layouts for the mentioned socs in sync.

Adjusting the env-layout on px30 to this scheme, magically solves the
overlap issue and also brings px30 more in line with the other mentioned
SoCs.

Signed-off-by: Heiko Stuebner &lt;heiko.stuebner@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Loading a FIT image for kernel, initrd and rootfs on px30 can result in an
memory overlap, resulting in the not 100% helpful message of
"This will not be a case any time" from lmb_fix_over_lap_regions().

Adding a bit of debug info to lmb_fix_over_lap_regions() brings:
lmb_fix_over_lap_regions: base1 0x280000-0x6005ac &gt; base2 0x600000-0x6000d1

So this is because the FIT image gets loaded to the kernel_addr_r at
0x280000 while the pxe-file is already living at 0x600000, only 3.5MB
behind.

In commit 4acc8bb044a4 ("configs: rockchip: sync ENV_MEM_LAYOUT_SETTINGS
for rk3308, rk3328, and rk3399") FUKAUMI Naoki already brought the memory
layouts for the mentioned socs in sync.

Adjusting the env-layout on px30 to this scheme, magically solves the
overlap issue and also brings px30 more in line with the other mentioned
SoCs.

Signed-off-by: Heiko Stuebner &lt;heiko.stuebner@cherry.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: stm32: env: Enable scan and start for AB schema on STM32MP15 DHSOM</title>
<updated>2025-05-05T13:51:46+00:00</updated>
<author>
<name>Pascal Zimmermann</name>
<email>pzimmermann@dh-electronics.com</email>
</author>
<published>2025-03-27T14:38:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d0d0b6a25ca73b36a916c63f5edbbd3638dc8dbf'/>
<id>d0d0b6a25ca73b36a916c63f5edbbd3638dc8dbf</id>
<content type='text'>
For the STM32MP15 DHSOM, change the default environment so an AB schema
on a device can be detected.

For this the define "SCAN_DEV_FOR_BOOT_PARTS" is overwritten and
appended.

The detection works by looking for the partitions with specific lables.
The name of those partitions are in the variables and its defaults:
* dh_ab_partname_primary=rootfs-a
* dh_ab_partname_secondary=rootfs-b

To prevent being hanging at bootcmd, enable "CONFIG_BOOT_RETRY" and
"CONFIG_RESET_TO_RETRY", but the timer will only be activated, if the AB
partitions are detected.

Signed-off-by: Pascal Zimmermann &lt;pzimmermann@dh-electronics.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
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<pre>
For the STM32MP15 DHSOM, change the default environment so an AB schema
on a device can be detected.

For this the define "SCAN_DEV_FOR_BOOT_PARTS" is overwritten and
appended.

The detection works by looking for the partitions with specific lables.
The name of those partitions are in the variables and its defaults:
* dh_ab_partname_primary=rootfs-a
* dh_ab_partname_secondary=rootfs-b

To prevent being hanging at bootcmd, enable "CONFIG_BOOT_RETRY" and
"CONFIG_RESET_TO_RETRY", but the timer will only be activated, if the AB
partitions are detected.

Signed-off-by: Pascal Zimmermann &lt;pzimmermann@dh-electronics.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</pre>
</div>
</content>
</entry>
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