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<title>u-boot.git/include/dt-bindings/clk, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>ARM: dts: rmobile: Synchronize DTs with Linux 6.1.7</title>
<updated>2023-02-02T00:49:19+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2023-01-26T20:01:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=71d2a5e5ef04a598d5b9da24d4d58a2ae3f662f6'/>
<id>71d2a5e5ef04a598d5b9da24d4d58a2ae3f662f6</id>
<content type='text'>
Synchronize R-Car device trees with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

The following script has been used for the synchronization:

$ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do
	if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then
		cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ;
	elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then
		cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/
	else
		echo "NOT FOUND: $i"
	fi
done
$ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' )

Move the include/dt-bindings/{clk,clock}/versaclock.h header used by
the renesas boards to match Linux 6.1.y as well.

Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used
by the arch/arm/dts/r8a774c0-cat874.dts board.

Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts
from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" .

Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect
the card enumeration in ebisu.dtsi /aliases DT node .

Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to
reflect the card enumeration in ulcb.dtsi /aliases DT node .

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Signed-off-by: Tam Nguyen &lt;tam.nguyen.xa@renesas.com&gt; # r8a779a0-falcon-u-boot.dts
Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt; # r8a779a0-falcon-u-boot.dts
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Synchronize R-Car device trees with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

The following script has been used for the synchronization:

$ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do
	if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then
		cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ;
	elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then
		cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/
	else
		echo "NOT FOUND: $i"
	fi
done
$ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' )

Move the include/dt-bindings/{clk,clock}/versaclock.h header used by
the renesas boards to match Linux 6.1.y as well.

Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used
by the arch/arm/dts/r8a774c0-cat874.dts board.

Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts
from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" .

Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect
the card enumeration in ebisu.dtsi /aliases DT node .

Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to
reflect the card enumeration in ulcb.dtsi /aliases DT node .

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Signed-off-by: Tam Nguyen &lt;tam.nguyen.xa@renesas.com&gt; # r8a779a0-falcon-u-boot.dts
Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt; # r8a779a0-falcon-u-boot.dts
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: clk: at91: Define additional UTMI related clocks</title>
<updated>2023-01-05T08:04:57+00:00</updated>
<author>
<name>Sergiu Moga</name>
<email>sergiu.moga@microchip.com</email>
</author>
<published>2023-01-04T14:04:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ee25ed5899b8a7ee125e58298bd1b71feedb79f1'/>
<id>ee25ed5899b8a7ee125e58298bd1b71feedb79f1</id>
<content type='text'>
Add definitions for an additional main UTMI clock as well as its
respective subclocks.

Signed-off-by: Sergiu Moga &lt;sergiu.moga@microchip.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add definitions for an additional main UTMI clock as well as its
respective subclocks.

Signed-off-by: Sergiu Moga &lt;sergiu.moga@microchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: Sync versaclock.h with upcoming 5.12-rc1</title>
<updated>2021-02-07T20:12:56+00:00</updated>
<author>
<name>Adam Ford</name>
<email>aford173@gmail.com</email>
</author>
<published>2021-02-03T12:57:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=de811ee46c488d3d115e9f050892e583cf8f6217'/>
<id>de811ee46c488d3d115e9f050892e583cf8f6217</id>
<content type='text'>
The versaclock doesn't have a driver yet, but there are a bunch
of device tree updates for the Beacon RZ/G2 boards that won't
compile without these.  A driver is coming, so sync the bindings
for now

Signed-off-by: Adam Ford &lt;aford173@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The versaclock doesn't have a driver yet, but there are a bunch
of device tree updates for the Beacon RZ/G2 boards that won't
compile without these.  A driver is coming, so sync the bindings
for now

Signed-off-by: Adam Ford &lt;aford173@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: at91: add pre-requisite headers for AT91 clock architecture</title>
<updated>2020-09-22T08:27:18+00:00</updated>
<author>
<name>Claudiu Beznea</name>
<email>claudiu.beznea@microchip.com</email>
</author>
<published>2020-09-07T14:46:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=643966a8fa620b763ad2c20c4d328aaefa23901d'/>
<id>643966a8fa620b763ad2c20c4d328aaefa23901d</id>
<content type='text'>
Add pre-requisite headers for AT91 clock architecture. These
are based on already present files on Linux and will be used
by following commits for AT91 CCF clock drivers.

Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add pre-requisite headers for AT91 clock architecture. These
are based on already present files on Linux and will be used
by following commits for AT91 CCF clock drivers.

Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: sifive: Sync-up DT bindings header with upstream Linux</title>
<updated>2019-07-19T06:24:51+00:00</updated>
<author>
<name>Anup Patel</name>
<email>Anup.Patel@wdc.com</email>
</author>
<published>2019-06-25T06:31:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=66591a719a0bdd7c81327c5f7d25bf23d211ae19'/>
<id>66591a719a0bdd7c81327c5f7d25bf23d211ae19</id>
<content type='text'>
The location and license header of DT bindings header for SiFive
clock driver has changed in upstream Linux hence this patch.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The location and license header of DT bindings header for SiFive
clock driver has changed in upstream Linux hence this patch.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Add SiFive FU540 PRCI clock driver</title>
<updated>2019-02-27T01:12:33+00:00</updated>
<author>
<name>Anup Patel</name>
<email>Anup.Patel@wdc.com</email>
</author>
<published>2019-02-25T08:14:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c40b6df87fc0193a7184ada9f53aaf57cdec0cdf'/>
<id>c40b6df87fc0193a7184ada9f53aaf57cdec0cdf</id>
<content type='text'>
Add driver code for the SiFive FU540 PRCI IP block.  This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.

Based on code written by Wesley Terpstra &lt;wesley@sifive.com&gt;
found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
https://github.com/riscv/riscv-linux

Boot and PLL rate change were tested on a SiFive HiFive Unleashed
board.

Signed-off-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add driver code for the SiFive FU540 PRCI IP block.  This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.

Based on code written by Wesley Terpstra &lt;wesley@sifive.com&gt;
found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
https://github.com/riscv/riscv-linux

Boot and PLL rate change were tested on a SiFive HiFive Unleashed
board.

Signed-off-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Signed-off-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Add MPC83xx clock driver</title>
<updated>2018-09-18T06:01:18+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-08-06T08:23:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=07d538d2814fa03be243c71879372f4263030b78'/>
<id>07d538d2814fa03be243c71879372f4263030b78</id>
<content type='text'>
Add a clock driver for the MPC83xx architecture.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a clock driver for the MPC83xx architecture.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: dra7xx: sync DT with latest Linux</title>
<updated>2016-12-04T18:54:51+00:00</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2016-11-23T07:55:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7aa1a40876a0da0fadf360a352bba0adf8624904'/>
<id>7aa1a40876a0da0fadf360a352bba0adf8624904</id>
<content type='text'>
Sync all dra7xx based dts files with latest Linux

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Sync all dra7xx based dts files with latest Linux

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
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