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<title>u-boot.git/include/dt-bindings/clock/tegra186-clock.h, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>include/dt-bindings: Remove functionally identical headers</title>
<updated>2025-06-06T16:50:05+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-05-27T23:50:37+00:00</published>
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As part of moving to using OF_UPSTREAM and so the upstream dt-bindings
headers we have a number of these headers that are in our include
directory and differ only in combinations of spacing changes and/or
switching to SPDX license tags. We can safely remove the copies under
include/dt-bindings now to prevent future conflicts.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
As part of moving to using OF_UPSTREAM and so the upstream dt-bindings
headers we have a number of these headers that are in our include
directory and differ only in combinations of spacing changes and/or
switching to SPDX license tags. We can safely remove the copies under
include/dt-bindings now to prevent future conflicts.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>ARM: tegra: add BPMP DT bindings</title>
<updated>2016-08-04T20:36:58+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-07-27T21:24:50+00:00</published>
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<id>7b9cb4940575f3b2d368d56ca06d3c0330af4c4b</id>
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The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. These bindings dictate how to represent the BPMP in device tree.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
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<pre>
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. These bindings dictate how to represent the BPMP in device tree.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
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</entry>
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