<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/include/dt-bindings/clock, branch v2017.11-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/include/dt-bindings/clock?h=v2017.11-rc1</id>
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<updated>2017-09-30T22:33:29Z</updated>
<entry>
<title>rockchip: clk: Add rv1108 SARADC clock support</title>
<updated>2017-09-30T22:33:29Z</updated>
<author>
<name>David Wu</name>
<email>david.wu@rock-chips.com</email>
</author>
<published>2017-09-20T06:28:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2e4ce50d1aca35d13944f48a7e15d0b63e86eb38'/>
<id>urn:sha1:2e4ce50d1aca35d13944f48a7e15d0b63e86eb38</id>
<content type='text'>
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 10-bits width.

Signed-off-by: David Wu &lt;david.wu@rock-chips.com&gt;
Acked-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>dm: clk: add clk driver support for stm32h7 SoCs</title>
<updated>2017-09-22T11:40:01Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@st.com</email>
</author>
<published>2017-09-13T16:00:06Z</published>
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<id>urn:sha1:4c3aebd56a035740f04fce44ce6c398afbb5ad86</id>
<content type='text'>
This driver implements basic clock setup, only clock gating
is implemented.

This driver doesn't implement .of_match as it's binded
by MFD RCC driver.

Files include/dt-bindings/clock/stm32h7-clks.h and
doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
will be available soon in a kernel tag, as all the
bindings have been acked by Rob Herring [1].

[1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html

Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ARM: dts: rmobile: Import DTS from Linux 4.12</title>
<updated>2017-08-02T18:50:03Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@gmail.com</email>
</author>
<published>2017-07-21T21:16:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4157c472c378c252d99b98bee1b85df54dc4e596'/>
<id>urn:sha1:4157c472c378c252d99b98bee1b85df54dc4e596</id>
<content type='text'>
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6,
commit 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3
and H3 ULCB and Salvator-X boards.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
Signed-off-by: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</content>
</entry>
<entry>
<title>ARM: DTS: stm32: align DT clock declaration with kernel</title>
<updated>2017-07-26T15:26:52Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@st.com</email>
</author>
<published>2017-07-18T07:29:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fa87abb6b67d21860b95f4c8a5d1c14008f7be46'/>
<id>urn:sha1:fa87abb6b67d21860b95f4c8a5d1c14008f7be46</id>
<content type='text'>
Use the same clocks macro than the one used by kernel DT.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Acked-by: Vikas MANOCHA &lt;vikas.manocha@st.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: meson: import dts files from Linux 4.12</title>
<updated>2017-07-26T15:26:48Z</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2017-07-09T22:30:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4a63a75c8313613da8f11b928c296ed7e08a9d67'/>
<id>urn:sha1:4a63a75c8313613da8f11b928c296ed7e08a9d67</id>
<content type='text'>
Import Amlogic Meson DTS files from Linux kernel version 4.12

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-rockchip</title>
<updated>2017-07-11T18:21:50Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-07-11T18:21:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d43ef73bf26614af9b01fd57baa1a1fcf24bfade'/>
<id>urn:sha1:d43ef73bf26614af9b01fd57baa1a1fcf24bfade</id>
<content type='text'>
</content>
</entry>
<entry>
<title>rockchip: rk322x: add dts file</title>
<updated>2017-07-11T10:13:46Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-06-23T09:17:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b647442ce8a3c191677155ff29ca0c41dc8c6d0c'/>
<id>urn:sha1:b647442ce8a3c191677155ff29ca0c41dc8c6d0c</id>
<content type='text'>
The dts files are from kernel and with modify to adapt U-Boot.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
</entry>
<entry>
<title>ARM64: dts: hi3798cv200-poplar: add device tree bindings</title>
<updated>2017-07-10T18:26:02Z</updated>
<author>
<name>Jorge Ramirez-Ortiz</name>
<email>jorge.ramirez-ortiz@linaro.org</email>
</author>
<published>2017-06-26T13:52:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ccaa83f8026a2359aabc9925a8a1f0e60f0b3fce'/>
<id>urn:sha1:ccaa83f8026a2359aabc9925a8a1f0e60f0b3fce</id>
<content type='text'>
Pulled from Linux 4.12-rc3

Signed-off-by: Jorge Ramirez-Ortiz &lt;jorge.ramirez-ortiz@linaro.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>rockchip: clk: Add rv1108 clock driver</title>
<updated>2017-06-07T13:29:25Z</updated>
<author>
<name>Andy Yan</name>
<email>andy.yan@rock-chips.com</email>
</author>
<published>2017-06-01T10:00:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bae2f282a96e400a2bbcc8a545598289f36e1c32'/>
<id>urn:sha1:bae2f282a96e400a2bbcc8a545598289f36e1c32</id>
<content type='text'>
Add clock driver support for Rockchip rv1108 soc

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3368: Add core start-up code for RK3368</title>
<updated>2017-06-07T13:29:19Z</updated>
<author>
<name>Andreas Färber</name>
<email>afaerber@suse.de</email>
</author>
<published>2017-05-15T09:51:18Z</published>
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<id>urn:sha1:37a0c6008553f3bbd0db6bb8a88e3f5b0c7606eb</id>
<content type='text'>
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.

Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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