u-boot.git/include/dt-bindings/clock, branch v2022.07 Unnamed repository; edit this file 'description' to name the repository. dt-bindings: sunxi: Update clock/reset binding headers 2022-05-22T23:37:50+00:00 Samuel Holland samuel@sholland.org 2022-04-27T20:31:20+00:00 9a50489c6075d1076a7f9af846f6391a27353b27 Some devicetree updates make use of newly-exposed clocks and resets. To support that, copy the binding headers from the Linux v5.18-rc1 tag. Signed-off-by: Samuel Holland <samuel@sholland.org> 
Some devicetree updates make use of newly-exposed clocks and resets.
To support that, copy the binding headers from the Linux v5.18-rc1 tag.

Signed-off-by: Samuel Holland <samuel@sholland.org>
clk: nuvoton: Add support for NPCM750 2022-05-05T13:28:47+00:00 Jim Liu jim.t90615@gmail.com 2022-04-19T05:32:20+00:00 c7554574ff1532983149ab6d7351896d1010b14e Add clock controller driver for NPCM750 Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Signed-off-by: Stanley Chu <yschu@nuvoton.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> 
Add clock controller driver for NPCM750

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
rockchip: rk3288-cru: sync the clock dt-binding header from Linux 2022-04-18T03:25:13+00:00 Johan Jonker jbx6244@gmail.com 2022-04-15T21:21:38+00:00 334d519a13e4636dd454738510fc840467109b0e In order to update the DT for rk3288 sync the clock dt-binding header. This is the state as of v5.17 in Linux. Keep SCLK_MAC_PLL in use for rk3288 clock driver. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
In order to update the DT for rk3288
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Keep SCLK_MAC_PLL in use for rk3288 clock driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: rk3228-cru: sync the clock dt-binding header from Linux 2022-04-18T03:25:13+00:00 Johan Jonker jbx6244@gmail.com 2022-04-15T21:21:33+00:00 6914ef8e6773e490d4c6b412d21143b27bb00b02 In order to update the DT for rk3228 sync the clock dt-binding header. This is the state as of v5.17 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
In order to update the DT for rk3228
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
dt-bindings: imx8mq-clock: add mainline definitions 2022-04-12T15:33:55+00:00 Angus Ainslie angus@akkea.ca 2022-03-29T14:02:38+00:00 a375c6f3fbee28107cfdbe14c113af110700ca7a Sync the clock ids with the mainline kernel 077de6e1c9f ("clk: imx8mq: add PLL monitor output") Signed-off-by: Angus Ainslie <angus@akkea.ca> Reviewed-by: Marek Vasut <marex@denx.de> 
Sync the clock ids with the mainline kernel

077de6e1c9f ("clk: imx8mq: add PLL monitor output")

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Marek Vasut <marex@denx.de>
ARM: dts: suniv: Add device tree files and bindings for F1C100s 2022-02-04T00:09:57+00:00 Icenowy Zheng icenowy@aosc.io 2022-01-29T15:23:08+00:00 ce2b6c448193e64faaaa3237ff64e9c6961a6653 Add device tree files for suniv and Lichee Pi Nano it is a board based on F1C100s. dt-bindings/dts are synced with 5.16.0 Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> 
Add device tree files for suniv and
Lichee Pi Nano it is a board based on F1C100s.
dt-bindings/dts are synced with 5.16.0

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
arm: rpi: Sync rpi dts files from Linux 2021-12-23T15:24:39+00:00 Simon Glass sjg@chromium.org 2021-12-17T03:59:13+00:00 9ae600e9e280f48d7c56dae891dbe1497d633ad7 Sync these files, obtained from Linux v5.15. This adds a devicetree file for rpi_4 which was not there before. Testing shows no change so far as I can see: - boots to U-Boot prompt on rpi0, rpi2 - boots to distro on rpi3 - boots to distro on rpi4 I am assuming that syncing with Linux is safe, but the maintainer should know for sure. Signed-off-by: Simon Glass <sjg@chromium.org> 
Sync these files, obtained from Linux v5.15.

This adds a devicetree file for rpi_4 which was not there before.

Testing shows no change so far as I can see:
- boots to U-Boot prompt on rpi0, rpi2
- boots to distro on rpi3
- boots to distro on rpi4

I am assuming that syncing with Linux is safe, but the maintainer should
know for sure.

Signed-off-by: Simon Glass <sjg@chromium.org>
arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linux 2021-11-09T11:48:23+00:00 Michael Walle michael@walle.cc 2021-10-13T16:14:26+00:00 7f900eabf7d665ccd1ae8cdf7743a0ea46ec13b2 Now that everything is prepared, copy the fsl-ls1028a.dtsi from the linux kernel v5.14.12. Notable changes: - second watchdog added - the number of chip selects of the SPI controller is now correct and reflects what the hardware offers - the LPUARTs have the correct clock parent - USB controllers are enabled by default, which was already the case before this sync because all board enabled all the USB controller nodes. A linux patch to fix this is pending. - the eSDHC controller changes from big-endian to little-endian, but that property seems to be not used at all. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> 
Now that everything is prepared, copy the fsl-ls1028a.dtsi from the
linux kernel v5.14.12.

Notable changes:
 - second watchdog added
 - the number of chip selects of the SPI controller is now correct and
   reflects what the hardware offers
 - the LPUARTs have the correct clock parent
 - USB controllers are enabled by default, which was already the case
   before this sync because all board enabled all the USB controller
   nodes. A linux patch to fix this is pending.
 - the eSDHC controller changes from big-endian to little-endian, but
   that property seems to be not used at all.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
ARM: meson: Sync Amlogic DT from Linux 5.14 2021-10-07T08:14:50+00:00 Neil Armstrong narmstrong@baylibre.com 2021-09-17T07:37:00+00:00 2e8d47c641aa951c8d8a7f401e2c652af1355f28 Import Amlogic DT changes from Linux commit 7d2a07b76933 ("Linux 5.14"), dt-bindings clock changes and new meson-g12b-gsking-x.dts, meson-sm1-bananapi-m5 & odroid-hc4 boards. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> 
Import Amlogic DT changes from Linux commit 7d2a07b76933 ("Linux 5.14"),
dt-bindings clock changes and new meson-g12b-gsking-x.dts,
meson-sm1-bananapi-m5 & odroid-hc4 boards.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
WS cleanup: remove trailing empty lines 2021-09-30T12:08:56+00:00 Wolfgang Denk wd@denx.de 2021-09-27T15:42:36+00:00 66356b4c06c934021f6cb58d93877427162b369f Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>