<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/include/dt-bindings/clock, branch v2023.07.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/include/dt-bindings/clock?h=v2023.07.01</id>
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<updated>2023-07-06T09:28:08Z</updated>
<entry>
<title>riscv: dts: sync mpfs-icicle devicetree with linux</title>
<updated>2023-07-06T09:28:08Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-06-15T10:12:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4e99899bd546b7cd60735df4b18da6eabdc38cb1'/>
<id>urn:sha1:4e99899bd546b7cd60735df4b18da6eabdc38cb1</id>
<content type='text'>
The "notable" disappearances are:
- the pac193x stanza - there's nothing in mainline linux w.r.t. bindings
  for this &amp; what is going to appear in mainline linux is going to be
  incompatible with what is currently in U-Boot.
- operating points - these operating points should not be set at the
  soc.dtsi level as they may not be possible depending on the design
  programmed to the FPGA
- clock output names - there are defines for the clock indices, these
  should not be needed
- the dt maintainers in linux NAKed using defines for IRQ numbers
- the qspi nand, which is not part of the icicle's default configuration
  is removed.

Reviewed-by: Padmarao Begari &lt;padmarao.begari@microchip.com&gt;
Tested-by: Padmarao Begari &lt;padmarao.begari@microchip.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: stm32mp: alignment with v6.3</title>
<updated>2023-06-16T09:22:07Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@foss.st.com</email>
</author>
<published>2023-04-24T14:21:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=08002ffd083d0caf8eea9c038a308dd45e2fb59c'/>
<id>urn:sha1:08002ffd083d0caf8eea9c038a308dd45e2fb59c</id>
<content type='text'>
Device tree alignment with Linux kernel v6.3:
- f5a058023239 - ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi
- 8539ebb435a5 - ARM: dts: stm32: enable i2c1 and i2c5 on
  stm32mp135f-dk.dts
- 8539ebb435a5 - ARM: dts: stm32: add spi nodes into stm32mp131.dtsi
- 15f72e0da4da - ARM: dts: stm32: add pinctrl and disabled spi5 node in
  stm32mp135f-dk
- ea99a5a02ebc - ARM: dts: stm32: Create separate pinmux for qspi cs pin
  in stm32mp15-pinctrl.dtsi
- a306d8962a24 - ARM: dts: stm32: Rename mdio0 to mdio
- 0a5ebb1f3367 - ARM: dts: stm32: Replace SAI format with dai-format DT
  property
- ccdab19738a6 - ARM: dts: stm32: add adc support to stm32mp13
- 022932ab55fd - ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk
- ab2806ddad9d - ARM: dts: stm32: add dummy vdd_adc regulator on
  stm32mp135f-dk
- e46a180c060f - ARM: dts: stm32: add adc support on stm32mp135f-dk
- 9ebf215fbae1 - ARM: dts: stm32: add PWR fixed regulators on stm32mp131
- 16f4ff60519a - ARM: dts: stm32: add USBPHYC and dual USB HS PHY support
  on stm32mp131
- 4a47f0f3e936 - ARM: dts: stm32: add UBSH EHCI and OHCI support on
  stm32mp131
- 2a46bb66c47f - ARM: dts: stm32: add USB OTG HS support on stm32mp131
- 9ebf215fbae1 - ARM: dts: stm32: add fixed regulators to support usb on
  stm32mp135f-dk
- 16f4ff60519a - ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk
- c4e7254cf6dc - ARM: dts: stm32: enable USB Host EHCI on stm32mp135f-dk
- 44978e135916 - ARM: dts: stm32: add pins for stm32g0 typec controller on stm32mp13
- 4f532403b1e5 - ARM: dts: stm32: enable USB OTG in dual role mode on
  stm32mp135f-dk
- e1f15571c96c - ARM: dts: stm32: add mcp23017 pinctrl entry for stm32mp13
- 6cc71374002e - ARM: dts: stm32: add mcp23017 IO expander on I2C1 on
  stm32mp135f-dk
- 7ffd2266bd32 - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp15xx-dhcor-som
- 21d83512bf2b - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp15xx-dhcom-som
- 732dbcf52f74 - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp151a-prtt1l
- 003b7c6b24f4 - ARM: dts: stm32: remove sai kernel clock on
  stm32mp15xx-dkx
- f2b17b39bfff - ARM: dts: stm32: rename sound card on stm32mp15xx-dkx
- dee3cb759d3d - ARM: dts: stm32: Remove the pins-are-numbered property
- ae8cf3b48727 - ARM: dts: stm32: add i2s nodes on stm32mp131
- 619746a27bd0 - ARM: dts: stm32: add sai nodes on stm32mp131
- c5e05d08ef90 - ARM: dts: stm32: add spdifrx node on stm32mp131
- 0a5afd3ee0d0 - ARM: dts: stm32: add dfsdm node on stm32mp131
- bf9d876bea2e - ARM: dts: stm32: add timers support on stm32mp131
- a3183748371d - ARM: dts: stm32: add timer pins muxing for stm32mp135f-dk
- a9060c1326bc - ARM: dts: stm32: add timers support on stm32mp135f-dk
- a12154058f75 - ARM: dts: stm32: Fix User button on stm32mp135f-dk
- 2f33df889e99 - ARM: dts: stm32: Use new media bus type macros
- 366384e49551 - ARM: dts: stm32: Update part number NVMEM description on
  stm32mp131

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: imx93: sync device tree with Linux</title>
<updated>2023-05-21T14:54:41Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2023-04-28T04:08:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=596b9c4e1bbd119bfee0a3a2779ce79438d00d43'/>
<id>urn:sha1:596b9c4e1bbd119bfee0a3a2779ce79438d00d43</id>
<content type='text'>
Sync device tree with next-20230426

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: add devicetree for Renesas RZ/N1 SoC</title>
<updated>2023-05-13T02:01:30Z</updated>
<author>
<name>Ralph Siemsen</name>
<email>ralph.siemsen@linaro.org</email>
</author>
<published>2023-05-13T01:36:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4647a84b6c363271a9f67d20ec0b987b9d26b2b4'/>
<id>urn:sha1:4647a84b6c363271a9f67d20ec0b987b9d26b2b4</id>
<content type='text'>
This is taken directly from Linux kernel 6.3
(commit 457391b0380335d5e9a5babdec90ac53928b23b4)

Signed-off-by: Ralph Siemsen &lt;ralph.siemsen@linaro.org&gt;
Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>dt-binding: histb-clock: add clocks definition for Hi3798MV200</title>
<updated>2023-05-03T13:05:24Z</updated>
<author>
<name>Yang Xiwen</name>
<email>forbidden405@outlook.com</email>
</author>
<published>2023-04-01T11:17:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=08ad608aa22b13b42cfb1f32ce071e52791cd669'/>
<id>urn:sha1:08ad608aa22b13b42cfb1f32ce071e52791cd669</id>
<content type='text'>
These clocks are found on Hi3798MV200

Signed-off-by: Yang Xiwen &lt;forbidden405@outlook.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: Import device tree for Broadcom Northstar</title>
<updated>2023-05-02T18:23:58Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2023-04-24T07:38:28Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8a5122bfd3bb8b60aba18788f1ce4d1d772c45a2'/>
<id>urn:sha1:8a5122bfd3bb8b60aba18788f1ce4d1d772c45a2</id>
<content type='text'>
This brings in the main SoC device tree used by the
Broadcom Northstar chipset, i.e. BCM4709x and BCM5301x.
This is taken from the v6.3 Linux kernel.

Cc: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add StarFive JH7110 clock definitions</title>
<updated>2023-04-20T08:08:44Z</updated>
<author>
<name>Yanhong Wang</name>
<email>yanhong.wang@starfivetech.com</email>
</author>
<published>2023-03-29T03:42:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=58c9c60b64a8d459ab0d204f9d5c468b0ae72e02'/>
<id>urn:sha1:58c9c60b64a8d459ab0d204f9d5c468b0ae72e02</id>
<content type='text'>
Add all clock outputs for the StarFive JH7110 clock generator.

Signed-off-by: Yanhong Wang &lt;yanhong.wang@starfivetech.com&gt;
Acked-by: Sean Anderson &lt;seanga2@gmail.com&gt;
Tested-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add R8A779G0 V4H CPG Core Clock Definitions</title>
<updated>2023-04-07T15:13:28Z</updated>
<author>
<name>Tho Vu</name>
<email>tho.vu.wh@renesas.com</email>
</author>
<published>2023-02-28T21:37:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0296ec364dddc24bc956e5828b342257603c1a9e'/>
<id>urn:sha1:0296ec364dddc24bc956e5828b342257603c1a9e</id>
<content type='text'>
Add all Clock Pulse Generator Core Clock Outputs for the
Renesas R-Car V4H (R8A779G0) SoC from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Signed-off-by: Tho Vu &lt;tho.vu.wh@renesas.com&gt;
Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
[Marek: Update to linux next 20230228 state]
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add R8A779F0 S4 CPG Core Clock headers</title>
<updated>2023-04-07T15:13:28Z</updated>
<author>
<name>Tho Vu</name>
<email>tho.vu.wh@renesas.com</email>
</author>
<published>2023-02-28T21:34:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2fa93af66ab7b7e6250d49f1cf32b78ca2114a61'/>
<id>urn:sha1:2fa93af66ab7b7e6250d49f1cf32b78ca2114a61</id>
<content type='text'>
Add definitions for R8A779F0 S4 CPG Core Clock headers from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Signed-off-by: Tho Vu &lt;tho.vu.wh@renesas.com&gt;
Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
[Marek: Update to linux next 20230228 state]
</content>
</entry>
<entry>
<title>sunxi: dts: arm: update devicetree files from Linux v6.2-rc2</title>
<updated>2023-03-05T23:33:13Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2023-01-12T11:18:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6621cc85f72e478c67801fb4a02fda73a736eebc'/>
<id>urn:sha1:6621cc85f72e478c67801fb4a02fda73a736eebc</id>
<content type='text'>
Sync the devicetree files from the Linux kernel repo, v6.2-rc2.
This is covering the 32-bit SoCs, from arch/arm/boot/dts.

This enables some new devices for the F1C100s family, though this is of
little relevance to U-Boot itself.
The H3 gains the "phys" property for the first USB controller, which
prevents an error message when U-Boot's USB stack comes up, and allows
using this port in host mode.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
</entry>
</feed>
