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<title>u-boot.git/include/dt-bindings/clock, branch v2026.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/include/dt-bindings/clock?h=v2026.07</id>
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<updated>2026-06-08T13:34:59Z</updated>
<entry>
<title>rockchip: Switch rk3229 boards to upstream devicetree</title>
<updated>2026-06-08T13:34:59Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-05-07T18:38:03Z</published>
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<id>urn:sha1:924f87b995fa6b451656df17f3b6be20a3cf9c4e</id>
<content type='text'>
Switch rk3229 boards to upstream devicetree.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: Switch rk3128 boards to upstream devicetree</title>
<updated>2026-06-08T13:34:59Z</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2026-05-07T18:37:50Z</published>
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<id>urn:sha1:3336e85b6a303663723436ca15dc5ea5ed5358e0</id>
<content type='text'>
Switch rk3128 boards to upstream devicetree.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: renesas: Use SCP_CLOCK_ID_CLK_S0D6_PERE_MAIN on R-Car X5H</title>
<updated>2026-05-21T19:48:05Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-05-07T17:37:49Z</published>
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<id>urn:sha1:9692469b18457af5039cf44b4d2e06ae1384f40d</id>
<content type='text'>
Use macro SCP_CLOCK_ID_CLK_S0D6_PERE_MAIN for SCMI clock 1691
instead of hardcoding the number in DT. No functional change.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add MediaTek MT8189 clock</title>
<updated>2026-03-17T21:34:55Z</updated>
<author>
<name>Irving-CH Lin</name>
<email>irving-ch.lin@mediatek.com</email>
</author>
<published>2026-03-03T19:54:54Z</published>
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<id>urn:sha1:290d17490e79abb108ee081ce43d51027814487f</id>
<content type='text'>
Add IDs for the clocks of MediaTek MT8189 SoC.

Signed-off-by: Irving-CH Lin &lt;irving-ch.lin@mediatek.com&gt;
Reviewed-by: Julien Stephan &lt;jstephan@baylibre.com&gt;
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-6-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>sifive: switch to OF_UPSTREAM</title>
<updated>2026-03-12T18:56:52Z</updated>
<author>
<name>Andreas Schwab</name>
<email>schwab@suse.de</email>
</author>
<published>2026-01-28T16:51:02Z</published>
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<id>urn:sha1:4dcff3b572a1d67c35b7ed71253a6d85aefe4e9b</id>
<content type='text'>
Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot.

Signed-off-by: Andreas Schwab &lt;schwab@suse.de&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>treewide: Remove Timesys from ADI ADSP maintenance</title>
<updated>2026-03-04T20:25:27Z</updated>
<author>
<name>Philip Molloy</name>
<email>philip.molloy@analog.com</email>
</author>
<published>2026-02-26T11:11:50Z</published>
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<id>urn:sha1:15e2bacc308d1ea2f50c53f8116fd15ba6c4af6e</id>
<content type='text'>
After years of developing the ADI ADSP platform, Timesys was purchased
by another company and is no longer contracted to maintain the platform.

Signed-off-by: Philip Molloy &lt;philip.molloy@analog.com&gt;
Reviewed-by: Greg Malysa &lt;malysagreg@gmail.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: mediatek: switch mt8365 to OF_UPSTREAM</title>
<updated>2025-12-31T17:50:56Z</updated>
<author>
<name>David Lechner</name>
<email>dlechner@baylibre.com</email>
</author>
<published>2025-12-10T23:40:14Z</published>
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<id>urn:sha1:fd104bea0c9596d34d5ff9fb1071936b42c333e0</id>
<content type='text'>
Change mt8365_evk_defconfig to use CONFIG_OF_UPSTREAM=y and delete the
U-Boot copy of the devicetree source files for mt8365.

The upstream devicetree is identical to the U-Boot one being removed
(other than having more nodes for devices not used by U-Boot and
upstream fixed a compatible string in &amp;scpsys, also not affecting
U-Boot).

There was one minor glitch with upstream missing a few topckgen macro
definitions, so those are added to the clock driver directly as a
workaround.

Reviewed-by: Macpaul Lin &lt;macpaul.lin@mediatek.com&gt;
Signed-off-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: renesas: Add Renesas R-Car X5H R8A78000 SoC DTs</title>
<updated>2025-12-02T23:17:15Z</updated>
<author>
<name>Hai Pham</name>
<email>hai.pham.ud@renesas.com</email>
</author>
<published>2025-12-02T18:34:15Z</published>
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<id>urn:sha1:b546189a4b515ba5aaf542558e9778d7d2a05b4e</id>
<content type='text'>
Add initial device trees for Renesas R-Car X5H R8A78000 SoC.
Include very basic clock, reset, power domain headers which
are used to control supported peripherals via SCMI / SCP. The
headers are currently kept limited to avoid possible ABI break.
A lot of clock are still stubbed via fixed-clock, this is going
to be gradually removed over time, as more of the platform is
upstreamed.

Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
Signed-off-by: Khanh Le &lt;khanh.le.xr@renesas.com&gt;
Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
</content>
</entry>
<entry>
<title>include: dt-bindings: clk: agilex: Add Agilex clock definitions header file</title>
<updated>2025-09-30T06:29:54Z</updated>
<author>
<name>Alif Zakuan Yuslaimi</name>
<email>alif.zakuan.yuslaimi@altera.com</email>
</author>
<published>2025-09-09T02:11:14Z</published>
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<id>urn:sha1:c4e9554015ebe919a480a54e508461af7a3e9fc8</id>
<content type='text'>
Introduce header file to define the clock indexes for the Agilex
platform.

Signed-off-by: Alif Zakuan Yuslaimi &lt;alif.zakuan.yuslaimi@altera.com&gt;
Reviewed-by: Tien Fong Chee &lt;tien.fong.chee@altera.com&gt;
</content>
</entry>
<entry>
<title>arm: zynqmp: Remove local copy of 'dt-bindings/clock/xlnx-zynqmp-clk.h'</title>
<updated>2025-07-08T12:58:43Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-06-12T18:11:28Z</published>
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<id>urn:sha1:4216a8634365b10dd1774ba4cd7367cc5ab831a4</id>
<content type='text'>
As part of the recent cleanup of dt-bindigns header files we did not
remove our copy of dt-bindings/clock/xlnx-zynqmp-clk.h at the time. This
is because the difference between ours and current upstream is that
current upstream has a #warning to not use it and to instead use
xlnx-zynqmp-clk.h. So we change zynqmp-clk-ccf.dtsi to use the other
and upstream-only file and then delete our dt-bindings file.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Tested-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/20250612181128.340232-1-trini@konsulko.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
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