As part of moving to using OF_UPSTREAM and so the upstream dt-bindings headers we have a number of these headers that are in our include directory and differ in being a strict subset of what is found upstream. We can safely remove the copies under include/dt-bindings now to prevent future conflicts. Signed-off-by: Tom Rini <trini@konsulko.com>
Use proper project name in DTs, messages and READMEs. Signed-off-by: Michal Simek <michal.simek@amd.com>
The i.MXRT11 series has different offsets for IOCR_MUX, it also can address 64MiB of SDRAM so add a macro for that. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
This patchset has following changes: - introduce stm32h750.dtsi to support stm32h750 value line - add pin groups for usart3/uart4/spi1/sdmmc2 - add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile) - add stm32h750i-art-pi.dts to support art-pi board - add stm32h750i-art-pi-u-boot.dtsi to support art-pi board (u-boot) art-pi board component: - 8MiB qspi flash - 16MiB spi flash - 32MiB sdram - ap6212 wifi&bt&fm the detail board information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add ddr memory definitions. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Add NS3 memory definitions. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Add SDRAM driver for i.MXRT SoCs. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Add a RAM driver for the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
_ Add gpio compatible and aliases for stm32f429 _ Add FMC sdram node with associated new bindings value to manage second bank (ie bank 1). _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl, pwrcfg and gpio nodes. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch adapts stm32h743 disco and eval dts files to match with U-boot requirements or add features wich are not yet upstreamed on kernel side : _ Add RCC clock driver node and update all clocks phandle accordingly. By default, on kernel side, all clocks was temporarly configured as a phandle to timer_clk waiting for a RCC clock driver to be available. On U-boot side, we now have a dedicated RCC clock driver, we can configured all clocks as phandle to this driver. All this binding update will be available soon in a kernel tag, as all the bindings have been acked by Rob Herring [1]. [1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html _ Align STM32H7 serial compatible string with the one which will be available in next kernel tag. The bindings has been acked by Rob Herring [2]. This compatible string will be usefull to add stm32h7 specific feature for this serial driver. [2] https://lkml.org/lkml/2017/7/17/739 _ Add gpio compatible and aliases for stm32h743 _ Add FMC sdram node with associated new bindings value to manage second bank (ie bank 1). _ Add missing HSI and CSI oscillators nodes needed by STM32H7 RCC clock driver. Clock sources could be: _ HSE (High Speed External) _ HSI (High Speed Internal) _ CSI (Low Power Internal) These clocks can be used as clocksource in some configuration. By default, HSE is selected as clock source. _ Set HSE to 25Mhz for stm32h743i-disco and eval board By default, the external oscillator frequency is defined at 25 Mhz in SoC stm32h743.dtsi file. It has been set at 125 Mhz in kernel DT temporarly waiting for RCC clock driver becomes available. As in U-boot we got a RCC clock driver, the real value of HSE clock can be used. _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl, pwrcfg and gpio nodes. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>