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<title>u-boot.git/include/dt-bindings/pinctrl/at91.h, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/include/dt-bindings/pinctrl/at91.h?h=main</id>
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<updated>2021-01-22T13:09:59Z</updated>
<entry>
<title>pinctrl: at91-pio4: implement drive strength support</title>
<updated>2021-01-22T13:09:59Z</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@microchip.com</email>
</author>
<published>2021-01-05T08:54:01Z</published>
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<id>urn:sha1:417eca09bf2b325bf0c6399c6b58a0692711542d</id>
<content type='text'>
Implement drive strength support, by preserving the same bindings
as in Linux.

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: at91-pio4: update license to SPDX style</title>
<updated>2021-01-22T13:09:59Z</updated>
<author>
<name>Eugen Hristev</name>
<email>eugen.hristev@microchip.com</email>
</author>
<published>2021-01-05T08:49:10Z</published>
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<id>urn:sha1:7cdcf0cb69f2b3e64194a1ab8845887737c2f795</id>
<content type='text'>
Update license header to SPDX style

Signed-off-by: Eugen Hristev &lt;eugen.hristev@microchip.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: at91: add slewrate support for SAM9X60</title>
<updated>2019-04-09T06:28:50Z</updated>
<author>
<name>Claudiu Beznea</name>
<email>claudiu.beznea@microchip.com</email>
</author>
<published>2019-03-25T10:34:00Z</published>
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<id>urn:sha1:068d4c0a11e43cce6e819e19884b49a8bc4e1722</id>
<content type='text'>
Add slew rate support for SAM9X60 pin controller.

Signed-off-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: at91: add pinctrl driver</title>
<updated>2017-04-13T20:44:50Z</updated>
<author>
<name>Wenyou Yang</name>
<email>wenyou.yang@atmel.com</email>
</author>
<published>2017-03-23T04:44:37Z</published>
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<id>urn:sha1:9319a756fffb0aae21adcd7caf8674411a22c165</id>
<content type='text'>
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.

Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@atmel.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm: at91: dts: Bring in device tree file for AT91SAM9G45</title>
<updated>2016-06-12T21:49:38Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-05-05T13:28:12Z</published>
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<id>urn:sha1:6f9678567a57c5c82620c35a05a2f89c32cdd34d</id>
<content type='text'>
Add this file from Linux v4.5.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Andreas Bießmann &lt;andreas@biessmann.org&gt;
</content>
</entry>
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