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<title>u-boot.git/include/dt-bindings/reset, branch v2020.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>arm: dts: mt7622: add SATA reset constants</title>
<updated>2020-08-19T21:38:14+00:00</updated>
<author>
<name>Frank Wunderlich</name>
<email>frank-w@public-files.de</email>
</author>
<published>2020-08-13T08:20:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=362e5e1e1977da83fabeab0738f7e377638c570f'/>
<id>362e5e1e1977da83fabeab0738f7e377638c570f</id>
<content type='text'>
add reset constants used for SATA to header file

Signed-off-by: Frank Wunderlich &lt;frank-w@public-files.de&gt;
</content>
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<pre>
add reset constants used for SATA to header file

Signed-off-by: Frank Wunderlich &lt;frank-w@public-files.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: prci: add indexes for reset signals available in prci</title>
<updated>2020-08-04T01:19:41+00:00</updated>
<author>
<name>Sagar Shrikant Kadam</name>
<email>sagar.kadam@sifive.com</email>
</author>
<published>2020-07-29T09:36:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ef9f65f389de594ac045698004b71df3ab0d0aa7'/>
<id>ef9f65f389de594ac045698004b71df3ab0d0aa7</id>
<content type='text'>
Add bit indexes for reset signals within the PRCI module
on FU540-C000 SoC.
The DDR and ethernet sub-system's have reset signals
indicated by these reset indexes.

Signed-off-by: Sagar Shrikant Kadam &lt;sagar.kadam@sifive.com&gt;
Reviewed-by: Pragnesh Patel &lt;pragnesh.patel@sifive.com&gt;
Reviewed-by: Bin Meng &lt;bin.meng@windriver.com&gt;
</content>
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<pre>
Add bit indexes for reset signals within the PRCI module
on FU540-C000 SoC.
The DDR and ethernet sub-system's have reset signals
indicated by these reset indexes.

Signed-off-by: Sagar Shrikant Kadam &lt;sagar.kadam@sifive.com&gt;
Reviewed-by: Pragnesh Patel &lt;pragnesh.patel@sifive.com&gt;
Reviewed-by: Bin Meng &lt;bin.meng@windriver.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>reset: Add Raspberry Pi 4 firmware reset controller</title>
<updated>2020-07-10T09:49:28+00:00</updated>
<author>
<name>Nicolas Saenz Julienne</name>
<email>nsaenzjulienne@suse.de</email>
</author>
<published>2020-06-29T16:37:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f676eb217bdff3bd734a42c8f9bbc58c9100055c'/>
<id>f676eb217bdff3bd734a42c8f9bbc58c9100055c</id>
<content type='text'>
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.

Signed-off-by: Nicolas Saenz Julienne &lt;nsaenzjulienne@suse.de&gt;
Signed-off-by: Matthias Brugger &lt;mbrugger@suse.com&gt;
</content>
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<pre>
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.

Signed-off-by: Nicolas Saenz Julienne &lt;nsaenzjulienne@suse.de&gt;
Signed-off-by: Matthias Brugger &lt;mbrugger@suse.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>riscv: Add device tree for K210 and Sipeed Maix BitM</title>
<updated>2020-07-01T07:01:22+00:00</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-06-24T10:41:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bba8618c8e7fb9fb181e714bd7ba0b8f255dcac6'/>
<id>bba8618c8e7fb9fb181e714bd7ba0b8f255dcac6</id>
<content type='text'>
Where possible, I have tried to find compatible drivers based on the layout
of registers. However, many devices remain untested. All untested devices
have been left disabled, but some tentative properties (such as compatible
strings, and clocks, interrupts, and resets properties) have been added.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
</content>
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<pre>
Where possible, I have tried to find compatible drivers based on the layout
of registers. However, many devices remain untested. All untested devices
have been left disabled, but some tentative properties (such as compatible
strings, and clocks, interrupts, and resets properties) have been added.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: actions: add S700 SoC device tree</title>
<updated>2020-04-24T20:40:09+00:00</updated>
<author>
<name>Amit Singh Tomar</name>
<email>amittomer25@gmail.com</email>
</author>
<published>2020-04-19T13:58:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1050eaa0821e16d622f4a91295a751c4b37e9032'/>
<id>1050eaa0821e16d622f4a91295a751c4b37e9032</id>
<content type='text'>
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d")
and required binding for S700 SoC that is a 64-bit Quad-core ARM
Cortex-A53 cores.

It also provisions dts file to be built based on selected
platform(CONFIG_MACH_S900/S700).

Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Amit Singh Tomar &lt;amittomer25@gmail.com&gt;
</content>
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<pre>
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d")
and required binding for S700 SoC that is a 64-bit Quad-core ARM
Cortex-A53 cores.

It also provisions dts file to be built based on selected
platform(CONFIG_MACH_S900/S700).

Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Amit Singh Tomar &lt;amittomer25@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: dts: sync dts for Action Semi S900</title>
<updated>2020-04-24T20:40:09+00:00</updated>
<author>
<name>Amit Singh Tomar</name>
<email>amittomer25@gmail.com</email>
</author>
<published>2020-04-19T13:58:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4939beea8e14314bc27ca343526c456ed75640fb'/>
<id>4939beea8e14314bc27ca343526c456ed75640fb</id>
<content type='text'>
Synchronize device tree bindings with v5.5-rc6 tag with commit id
"b3a987b0264d".

Also, it removes older clock binding defined for S900 along with undocumented
compatible string "actions,s900-serial" from serial driver and adapts clock
driver to cater to new bindings.

Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Amit Singh Tomar &lt;amittomer25@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Synchronize device tree bindings with v5.5-rc6 tag with commit id
"b3a987b0264d".

Also, it removes older clock binding defined for S900 along with undocumented
compatible string "actions,s900-serial" from serial driver and adapts clock
driver to cater to new bindings.

Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Amit Singh Tomar &lt;amittomer25@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm64: dts: meson: sync dt and bindings from v5.6-rc2</title>
<updated>2020-04-06T07:56:35+00:00</updated>
<author>
<name>Jerome Brunet</name>
<email>jbrunet@baylibre.com</email>
</author>
<published>2020-03-05T11:12:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=dd5f2351e99aad8fcbedbc1305b8b51b09952336'/>
<id>dd5f2351e99aad8fcbedbc1305b8b51b09952336</id>
<content type='text'>
Sync the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2")

The only exception to this is the mmc pinctrl pin bias of gxl SoC family.
This is a fix which found its way to u-boot but not Linux yet.

Acked-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
</content>
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<pre>
Sync the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2")

The only exception to this is the mmc pinctrl pin bias of gxl SoC family.
This is a fix which found its way to u-boot but not Linux yet.

Acked-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sunxi: H3/H5 Sync DT files from upstream Linux kernel as of next-20200108</title>
<updated>2020-01-24T17:36:49+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2020-01-12T15:36:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b5fe523bbc2a09069040ca70123246b251cd7daf'/>
<id>b5fe523bbc2a09069040ca70123246b251cd7daf</id>
<content type='text'>
Sync the device tree files and device tree header files from upstream
Linux kernel, as of 2020-01-08. The commit synced to in the sunxi repo

    98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next

which is also part of next-20200108.

Changes brought in include:

  - cleanup of pinmux node names
  - addition of Security ID, MBUS, CSI, crypto engine, video codec,
    pmu, and thermal sensor device nodes for both SoCs
  - addition of deinterlacing engine device node on H3
  - cleanup of RTC device node and addition of its clocks
  - various board cleanups and improvements
    - removal of pinmux node for GPIO lines
    - cpufreq / DVFS
    - HDMI output
    - UART-based Bluetooth
    - audio codec
    - USB ports
  - new boards

Most of the changes don't concern U-boot.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Sync the device tree files and device tree header files from upstream
Linux kernel, as of 2020-01-08. The commit synced to in the sunxi repo

    98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next

which is also part of next-20200108.

Changes brought in include:

  - cleanup of pinmux node names
  - addition of Security ID, MBUS, CSI, crypto engine, video codec,
    pmu, and thermal sensor device nodes for both SoCs
  - addition of deinterlacing engine device node on H3
  - cleanup of RTC device node and addition of its clocks
  - various board cleanups and improvements
    - removal of pinmux node for GPIO lines
    - cpufreq / DVFS
    - HDMI output
    - UART-based Bluetooth
    - audio codec
    - USB ports
  - new boards

Most of the changes don't concern U-boot.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARC: HSDK: introduce reset driver</title>
<updated>2019-11-01T13:45:40+00:00</updated>
<author>
<name>Eugeniy Paltsev</name>
<email>Eugeniy.Paltsev@synopsys.com</email>
</author>
<published>2019-10-08T16:29:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c597e248d9794ab40f68586bfa9e3596949df44b'/>
<id>c597e248d9794ab40f68586bfa9e3596949df44b</id>
<content type='text'>
Introduce reset driver for Synopsys ARC HSDK SoC

Signed-off-by: Eugeniy Paltsev &lt;Eugeniy.Paltsev@synopsys.com&gt;
Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</content>
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<pre>
Introduce reset driver for Synopsys ARC HSDK SoC

Signed-off-by: Eugeniy Paltsev &lt;Eugeniy.Paltsev@synopsys.com&gt;
Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips</title>
<updated>2019-10-26T00:07:24+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-10-26T00:07:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ffc379b42c85466e1dd4c8fee8268801f26d2ab8'/>
<id>ffc379b42c85466e1dd4c8fee8268801f26d2ab8</id>
<content type='text'>
- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
</content>
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<pre>
- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
</pre>
</div>
</content>
</entry>
</feed>
