u-boot.git/include/dt-bindings/reset, branch v2021.01-rc2

reset: ast2500: Use SCU for reset control

2020-10-22T15:26:14Z

The System Control Unit (SCU) controller of Aspeed SoCs provides the reset control for each peripheral. This patch refactors the reset method to leverage the SCU reset control. Thus the driver dependency on watchdog including dedicated WDT API and reset flag encoding can be eliminated. The Kconfig description is also updated accordingly. Signed-off-by: Chia-Wei, Wang Reviewed-by: Ryan Chen

Merge tag 'u-boot-amlogic-20201005' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

2020-10-06T12:36:10Z

- generate unique mac address from SoC serial on S400 board - Add USB support for GXL and AXG SoCs - Update Gadget code to use the new GXL and AXG USB glue driver - Add a VIM3 board support to add dynamic PCIe enable in OS DT - Fix AXG pinmux with requesting GPIOs - Add missing GPIOA_18 for AXG pinctrl - Add Amlogic PWM driver

ARM: dts: sync amlogic AXG/GXL/GXM DT from Linux 5.8-rc1

2020-10-05T15:59:45Z

This imports the AXG, GXL & GXM SoC and boards DT changes from the Linux commit b3a9e3b9622a ("Linux 5.8-rc1"). This change also removes GXL & GXM u-boot.dtsi hacks for USB gadget. Signed-off-by: Neil Armstrong

reset: Add IPQ40xx reset controller driver

2020-09-18T20:20:47Z

On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets. So since this will be needed by further drivers, lets add a driver for the reset controller. Signed-off-by: Robert Marko Cc: Luka Perkov

arm: dts: mt7622: add SATA reset constants

2020-08-19T21:38:14Z

add reset constants used for SATA to header file Signed-off-by: Frank Wunderlich

dt-bindings: prci: add indexes for reset signals available in prci

2020-08-04T01:19:41Z

Add bit indexes for reset signals within the PRCI module on FU540-C000 SoC. The DDR and ethernet sub-system's have reset signals indicated by these reset indexes. Signed-off-by: Sagar Shrikant Kadam Reviewed-by: Pragnesh Patel Reviewed-by: Bin Meng

reset: Add Raspberry Pi 4 firmware reset controller

2020-07-10T09:49:28Z

Raspberry Pi 4's co-processor controls some of the board's HW initialization process, but it's up to Linux to trigger it when relevant. Introduce a reset controller capable of interfacing with RPi4's co-processor that models these firmware initialization routines as reset lines. Signed-off-by: Nicolas Saenz Julienne Signed-off-by: Matthias Brugger

riscv: Add device tree for K210 and Sipeed Maix BitM

2020-07-01T07:01:22Z

Where possible, I have tried to find compatible drivers based on the layout of registers. However, many devices remain untested. All untested devices have been left disabled, but some tentative properties (such as compatible strings, and clocks, interrupts, and resets properties) have been added. Signed-off-by: Sean Anderson

arm: actions: add S700 SoC device tree

2020-04-24T20:40:09Z

This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d") and required binding for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores. It also provisions dts file to be built based on selected platform(CONFIG_MACH_S900/S700). Reviewed-by: Manivannan Sadhasivam Reviewed-by: Andre Przywara Signed-off-by: Amit Singh Tomar

arm: dts: sync dts for Action Semi S900

2020-04-24T20:40:09Z

Synchronize device tree bindings with v5.5-rc6 tag with commit id "b3a987b0264d". Also, it removes older clock binding defined for S900 along with undocumented compatible string "actions,s900-serial" from serial driver and adapts clock driver to cater to new bindings. Reviewed-by: Manivannan Sadhasivam Reviewed-by: Andre Przywara Signed-off-by: Amit Singh Tomar