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<title>u-boot.git/include/dt-bindings, branch v2015.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>ARM: tegra: Add Tegra30 PCIe device tree node</title>
<updated>2014-12-18T20:19:21+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-10T05:25:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a1811bc5b999998ef5f42e2312a1140eb7cf3957'/>
<id>a1811bc5b999998ef5f42e2312a1140eb7cf3957</id>
<content type='text'>
Add the device tree node for the PCIe controller found on Tegra30 SoCs.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
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<pre>
Add the device tree node for the PCIe controller found on Tegra30 SoCs.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: tegra: Add Tegra20 PCIe device tree node</title>
<updated>2014-12-18T20:19:20+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-10T05:25:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=65d2465d5d4cdb347506438b226b01d6ef0eec79'/>
<id>65d2465d5d4cdb347506438b226b01d6ef0eec79</id>
<content type='text'>
Add the device tree node for the PCIe controller found on Tegra20 SoCs.

Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
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<pre>
Add the device tree node for the PCIe controller found on Tegra20 SoCs.

Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: tegra: Implement XUSB pad controller</title>
<updated>2014-12-18T20:19:20+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-10T05:25:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=79c7a90f6c642c27da3de5c134816be7f0405f1d'/>
<id>79c7a90f6c642c27da3de5c134816be7f0405f1d</id>
<content type='text'>
This controller was introduced on Tegra114 to handle XUSB pads. On
Tegra124 it is also used for PCIe and SATA pin muxing and PHY control.
Only the Tegra124 PCIe and SATA functionality is currently implemented,
with weak symbols on Tegra114.

Tegra20 and Tegra30 also provide weak symbols for these functions so
that drivers can use the same API irrespective of which SoC they're
being built for.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
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<pre>
This controller was introduced on Tegra114 to handle XUSB pads. On
Tegra124 it is also used for PCIe and SATA pin muxing and PHY control.
Only the Tegra124 PCIe and SATA functionality is currently implemented,
with weak symbols on Tegra114.

Tegra20 and Tegra30 also provide weak symbols for these functions so
that drivers can use the same API irrespective of which SoC they're
being built for.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-socfpga</title>
<updated>2014-12-16T14:41:00+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-12-16T14:41:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3bfbf32b6fe5e2d4605bc7ee99d1844b572662c2'/>
<id>3bfbf32b6fe5e2d4605bc7ee99d1844b572662c2</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>tegra: dts: Sync tegra124.dtsi with linux kernel</title>
<updated>2014-12-11T20:18:44+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-12-04T13:36:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=754204b5c2bbb810c4f332227227af086f935686'/>
<id>754204b5c2bbb810c4f332227227af086f935686</id>
<content type='text'>
Sync this up with Linux v3.18-rc5. Exclude features that are unlikely to
supported in U-Boot soon (regulators, pinmux). Also the addresses are
updated to 32-bit. Otherwise it is the same. Also bring in the dt-bindings
for pinctrl.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
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<pre>
Sync this up with Linux v3.18-rc5. Exclude features that are unlikely to
supported in U-Boot soon (regulators, pinmux). Also the addresses are
updated to 32-bit. Otherwise it is the same. Also bring in the dt-bindings
for pinctrl.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: socfpga: dts: altr,rst-mgr.h: Move to SPDX license identifiers</title>
<updated>2014-12-06T12:52:47+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2014-11-16T11:46:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f37a126692bf97bd77f49252db927f68ec45db43'/>
<id>f37a126692bf97bd77f49252db927f68ec45db43</id>
<content type='text'>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Vince Bridgers &lt;vbridger@altera.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
</content>
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<pre>
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Vince Bridgers &lt;vbridger@altera.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-socfpga</title>
<updated>2014-11-11T21:59:44+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-11-11T21:59:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c88eaea0a0a809884388c3a5727d960bac0b0ced'/>
<id>c88eaea0a0a809884388c3a5727d960bac0b0ced</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target</title>
<updated>2014-11-07T14:58:31+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2014-11-07T13:10:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=51c580c6c92c01884f520f4ffaeb6885ee8e666e'/>
<id>51c580c6c92c01884f520f4ffaeb6885ee8e666e</id>
<content type='text'>
This patch includes the latest DT sources for socfpga from the current
Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
"socfpga_socrates" (the EBV SoCrates board) to make use of this new DT
support.

Until this patch, the only SoCFPGA U-Boot target in mainline is
"socfpga_cyclone5". This build target is not (yet) changed to support
DT. So nothing changes for this target. Even though the long-term
goal should be to move all SoCFPGA targets over to DT.

One of the reasons to enable DT support in SoCFPGA is, that I need to
support multiple different SPI controllers for this platform. This is
the QSPI Cadence controller and the Designware SPI master controller.
Both are implemented in the SoCFPGA. And enabling both controllers is
only possible by using the new driver model (DM). The DM SPI code
only supports DT based probing. So it was easier to move SoCFPGA to
DT than to add the (deprecated) platform-data based probing to the
DM SPI suport.

Note that the image with the dtb embedded is u-boot-dtb.img. This needs
to be used now for those DT enabled boards instead of u-boot.img.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Vince Bridgers &lt;vbridger@altera.com&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This patch includes the latest DT sources for socfpga from the current
Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
"socfpga_socrates" (the EBV SoCrates board) to make use of this new DT
support.

Until this patch, the only SoCFPGA U-Boot target in mainline is
"socfpga_cyclone5". This build target is not (yet) changed to support
DT. So nothing changes for this target. Even though the long-term
goal should be to move all SoCFPGA targets over to DT.

One of the reasons to enable DT support in SoCFPGA is, that I need to
support multiple different SPI controllers for this platform. This is
the QSPI Cadence controller and the Designware SPI master controller.
Both are implemented in the SoCFPGA. And enabling both controllers is
only possible by using the new driver model (DM). The DM SPI code
only supports DT based probing. So it was easier to move SoCFPGA to
DT than to add the (deprecated) platform-data based probing to the
DM SPI suport.

Note that the image with the dtb embedded is u-boot-dtb.img. This needs
to be used now for those DT enabled boards instead of u-boot.img.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Vince Bridgers &lt;vbridger@altera.com&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: sunxi: dts: Add sun7i device tree files</title>
<updated>2014-11-05T12:09:58+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-31T02:25:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=643ad899f545fd101aa7a67771e74d582a1829b2'/>
<id>643ad899f545fd101aa7a67771e74d582a1829b2</id>
<content type='text'>
These are from Linux 3.17-rc7 (commit fe82dcec). U-Boot only uses a small
portion of these, but we may as well have something to look forward to.

The total compiled size is about 25KB.

Acked-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These are from Linux 3.17-rc7 (commit fe82dcec). U-Boot only uses a small
portion of these, but we may as well have something to look forward to.

The total compiled size is about 25KB.

Acked-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: dts: Move omap device tree includes to correct place</title>
<updated>2014-10-24T01:30:51+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-23T19:15:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2d91a9772c71e7f7c09fa4f6db2c3d11e6af8176'/>
<id>2d91a9772c71e7f7c09fa4f6db2c3d11e6af8176</id>
<content type='text'>
These ended up in arch/arm/dts/dt-bindings temporarily, but in fact the
correct place is now include/dt-bindings. Move them to be consistent.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These ended up in arch/arm/dts/dt-bindings temporarily, but in fact the
correct place is now include/dt-bindings. Move them to be consistent.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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