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<title>u-boot.git/include/dt-bindings, branch v2017.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>rockchip: rk3368: add DRAM controller driver with DRAM initialisation</title>
<updated>2017-08-13T15:12:33+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-06-22T22:12:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=403e9cbcd5d2da3f5af0e67552c6ecc13a472830'/>
<id>403e9cbcd5d2da3f5af0e67552c6ecc13a472830</id>
<content type='text'>
This adds a DRAM controller driver for the RK3368 and places it in
drivers/ram/rockchip (where the other DM-enabled DRAM controller
drivers for rockchip devices should also be moved eventually).

At this stage, only the following feature-set is supported:
 - DDR3
 - 32-bit configuration (i.e. fully populated)
 - dual-rank (i.e. no auto-detection of ranks)
 - DDR3-1600K speed-bin

This driver expects to run from a TPL stage that will later return to
the RK3368 BROM.  It communicates with later stages through the
os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR
init code).

Unlike other DMC drivers for RK32xx and RK33xx parts, the required
timings are calculated within the driver based on a target frequency
and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this
time).

The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0)
register for controlling the operation of its (single-channel) DRAM
controller in the GRF block.  This provides for selecting DDR3, mobile
DDR modes, and control low-power operation.
As part of this change, DDRC0_CON0 is also added to the GRF structure
definition (at offset 0x600).

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
This adds a DRAM controller driver for the RK3368 and places it in
drivers/ram/rockchip (where the other DM-enabled DRAM controller
drivers for rockchip devices should also be moved eventually).

At this stage, only the following feature-set is supported:
 - DDR3
 - 32-bit configuration (i.e. fully populated)
 - dual-rank (i.e. no auto-detection of ranks)
 - DDR3-1600K speed-bin

This driver expects to run from a TPL stage that will later return to
the RK3368 BROM.  It communicates with later stages through the
os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR
init code).

Unlike other DMC drivers for RK32xx and RK33xx parts, the required
timings are calculated within the driver based on a target frequency
and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this
time).

The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0)
register for controlling the operation of its (single-channel) DRAM
controller in the GRF block.  This provides for selecting DDR3, mobile
DDR modes, and control low-power operation.
As part of this change, DDRC0_CON0 is also added to the GRF structure
definition (at offset 0x600).

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: dts: rmobile: Import DTS from Linux 4.12</title>
<updated>2017-08-02T18:50:03+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@gmail.com</email>
</author>
<published>2017-07-21T21:16:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4157c472c378c252d99b98bee1b85df54dc4e596'/>
<id>4157c472c378c252d99b98bee1b85df54dc4e596</id>
<content type='text'>
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6,
commit 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3
and H3 ULCB and Salvator-X boards.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
Signed-off-by: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
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<pre>
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6,
commit 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3
and H3 ULCB and Salvator-X boards.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
Signed-off-by: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: DTS: stm32: align DT clock declaration with kernel</title>
<updated>2017-07-26T15:26:52+00:00</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@st.com</email>
</author>
<published>2017-07-18T07:29:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fa87abb6b67d21860b95f4c8a5d1c14008f7be46'/>
<id>fa87abb6b67d21860b95f4c8a5d1c14008f7be46</id>
<content type='text'>
Use the same clocks macro than the one used by kernel DT.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Acked-by: Vikas MANOCHA &lt;vikas.manocha@st.com&gt;
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<pre>
Use the same clocks macro than the one used by kernel DT.

Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Acked-by: Vikas MANOCHA &lt;vikas.manocha@st.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: dts: meson: import dts files from Linux 4.12</title>
<updated>2017-07-26T15:26:48+00:00</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2017-07-09T22:30:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4a63a75c8313613da8f11b928c296ed7e08a9d67'/>
<id>4a63a75c8313613da8f11b928c296ed7e08a9d67</id>
<content type='text'>
Import Amlogic Meson DTS files from Linux kernel version 4.12

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Import Amlogic Meson DTS files from Linux kernel version 4.12

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-rockchip</title>
<updated>2017-07-11T18:21:50+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-07-11T18:21:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d43ef73bf26614af9b01fd57baa1a1fcf24bfade'/>
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</pre>
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</content>
</entry>
<entry>
<title>rockchip: rk322x: add dts file</title>
<updated>2017-07-11T10:13:46+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2017-06-23T09:17:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b647442ce8a3c191677155ff29ca0c41dc8c6d0c'/>
<id>b647442ce8a3c191677155ff29ca0c41dc8c6d0c</id>
<content type='text'>
The dts files are from kernel and with modify to adapt U-Boot.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
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<pre>
The dts files are from kernel and with modify to adapt U-Boot.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM64: dts: hi3798cv200-poplar: add device tree bindings</title>
<updated>2017-07-10T18:26:02+00:00</updated>
<author>
<name>Jorge Ramirez-Ortiz</name>
<email>jorge.ramirez-ortiz@linaro.org</email>
</author>
<published>2017-06-26T13:52:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ccaa83f8026a2359aabc9925a8a1f0e60f0b3fce'/>
<id>ccaa83f8026a2359aabc9925a8a1f0e60f0b3fce</id>
<content type='text'>
Pulled from Linux 4.12-rc3

Signed-off-by: Jorge Ramirez-Ortiz &lt;jorge.ramirez-ortiz@linaro.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Pulled from Linux 4.12-rc3

Signed-off-by: Jorge Ramirez-Ortiz &lt;jorge.ramirez-ortiz@linaro.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: clk: Add rv1108 clock driver</title>
<updated>2017-06-07T13:29:25+00:00</updated>
<author>
<name>Andy Yan</name>
<email>andy.yan@rock-chips.com</email>
</author>
<published>2017-06-01T10:00:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bae2f282a96e400a2bbcc8a545598289f36e1c32'/>
<id>bae2f282a96e400a2bbcc8a545598289f36e1c32</id>
<content type='text'>
Add clock driver support for Rockchip rv1108 soc

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Add clock driver support for Rockchip rv1108 soc

Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3368: Add core start-up code for RK3368</title>
<updated>2017-06-07T13:29:19+00:00</updated>
<author>
<name>Andreas Färber</name>
<email>afaerber@suse.de</email>
</author>
<published>2017-05-15T09:51:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=37a0c6008553f3bbd0db6bb8a88e3f5b0c7606eb'/>
<id>37a0c6008553f3bbd0db6bb8a88e3f5b0c7606eb</id>
<content type='text'>
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.

Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.

Signed-off-by: Andreas Färber &lt;afaerber@suse.de&gt;
Signed-off-by: Andy Yan &lt;andy.yan@rock-chips.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-sunxi</title>
<updated>2017-06-03T22:04:54+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-06-03T22:04:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b07d044d5bfa8c440b172eb3f8a9d537f82e21b6'/>
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