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<title>u-boot.git/include/dt-bindings, branch v2021.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>drivers: clk: Add clock driver for Intel N5X device</title>
<updated>2021-08-25T04:51:53+00:00</updated>
<author>
<name>Siew Chin Lim</name>
<email>elly.siew.chin.lim@intel.com</email>
</author>
<published>2021-08-10T03:26:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=05e1e3befa380c1f4114bfbd877b0b8ca334a5e9'/>
<id>05e1e3befa380c1f4114bfbd877b0b8ca334a5e9</id>
<content type='text'>
Add clock manager driver for N5X. Provides clock initialization
and get_rate functions.

Signed-off-by: Siew Chin Lim &lt;elly.siew.chin.lim@intel.com&gt;
</content>
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<pre>
Add clock manager driver for N5X. Provides clock initialization
and get_rate functions.

Signed-off-by: Siew Chin Lim &lt;elly.siew.chin.lim@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3188-power: sync power domain dt-binding header from Linux</title>
<updated>2021-08-11T09:54:37+00:00</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2021-06-25T13:26:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=76dccdca2e7e45106b0f1b5498c05056e92c1077'/>
<id>76dccdca2e7e45106b0f1b5498c05056e92c1077</id>
<content type='text'>
In order to update the DT for rk3188
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
In order to update the DT for rk3188
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3188-cru-common: sync clock dt-binding header from Linux</title>
<updated>2021-08-11T09:54:37+00:00</updated>
<author>
<name>Johan Jonker</name>
<email>jbx6244@gmail.com</email>
</author>
<published>2021-06-25T13:26:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=571f679d1aa7eb98dcae7691dd34596beda1dfb2'/>
<id>571f679d1aa7eb98dcae7691dd34596beda1dfb2</id>
<content type='text'>
In order to update the DT for rk3066 and rk3188
sync the clock dt-binding header.
This is the state as of v5.12 in Linux.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
In order to update the DT for rk3066 and rk3188
sync the clock dt-binding header.
This is the state as of v5.12 in Linux.

Signed-off-by: Johan Jonker &lt;jbx6244@gmail.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: dts: add i.MX8ULP dtsi</title>
<updated>2021-08-09T12:46:51+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2021-08-07T08:01:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6beec0e78caf1022564356a128d22074daa4d0c7'/>
<id>6beec0e78caf1022564356a128d22074daa4d0c7</id>
<content type='text'>
Add i.MX8ULP dtsi

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
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<pre>
Add i.MX8ULP dtsi

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: ti-serdes-mux: Add defines for AM64 SoC</title>
<updated>2021-07-27T05:26:53+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2021-07-21T15:58:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2b0f7dee5fcd71de11faf2d096d22b241ce920d7'/>
<id>2b0f7dee5fcd71de11faf2d096d22b241ce920d7</id>
<content type='text'>
AM64 has a single lane SERDES which can be configured to be used
with either PCIe or USB. Define the possilbe values for the SERDES
function in AM64 SoC here.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-7-kishon@ti.com
</content>
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<pre>
AM64 has a single lane SERDES which can be configured to be used
with either PCIe or USB. Define the possilbe values for the SERDES
function in AM64 SoC here.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-7-kishon@ti.com
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: phy: cadence-torrent: Add defines for refclk driver</title>
<updated>2021-07-27T05:26:53+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2021-07-21T15:58:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0b5ea853be820e05f15077b451fe228efe9df449'/>
<id>0b5ea853be820e05f15077b451fe228efe9df449</id>
<content type='text'>
Add defines for refclk driver used to route the refclk out of torrent
SERDES.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-6-kishon@ti.com
</content>
<content type='xhtml'>
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<pre>
Add defines for refclk driver used to route the refclk out of torrent
SERDES.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-6-kishon@ti.com
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: phy: Add defines for AM64 SERDES Wrapper</title>
<updated>2021-07-27T05:26:53+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2021-07-21T15:58:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2b6b37032c8f2e7f04186d617b16bc9502c13b9b'/>
<id>2b6b37032c8f2e7f04186d617b16bc9502c13b9b</id>
<content type='text'>
Add defines for AM64 SERDES Wrapper.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-5-kishon@ti.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add defines for AM64 SERDES Wrapper.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-5-kishon@ti.com
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: phy: Add definitions for additional phy types</title>
<updated>2021-07-27T05:26:53+00:00</updated>
<author>
<name>Aswath Govindraju</name>
<email>a-govindraju@ti.com</email>
</author>
<published>2021-07-21T15:58:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4f2c79e42c031a0ac120e87cb665725e47152d9d'/>
<id>4f2c79e42c031a0ac120e87cb665725e47152d9d</id>
<content type='text'>
Add definitions for additional phy types that's used specifically for
Torrent SERDES.

Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-4-kishon@ti.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add definitions for additional phy types that's used specifically for
Torrent SERDES.

Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Link: https://lore.kernel.org/r/20210721155849.20994-4-kishon@ti.com
</pre>
</div>
</content>
</entry>
<entry>
<title>dt-bindings: Resync omap &amp; am33xx pinctrl bindings</title>
<updated>2021-07-27T05:26:09+00:00</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker@sancloud.com</email>
</author>
<published>2021-07-12T20:14:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=33e9021a9aceee4b9e80fa78461638cb32f1d060'/>
<id>33e9021a9aceee4b9e80fa78461638cb32f1d060</id>
<content type='text'>
These headers are updated to match the versions in Linux 5.13.1.

Signed-off-by: Paul Barker &lt;paul.barker@sancloud.com&gt;
</content>
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<pre>
These headers are updated to match the versions in Linux 5.13.1.

Signed-off-by: Paul Barker &lt;paul.barker@sancloud.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: pci: Allow binding of some devices before relocation</title>
<updated>2021-07-15T11:49:50+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-06-27T23:50:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f5cbb5c7cd24b5e674933bb381d854c02512d2d9'/>
<id>f5cbb5c7cd24b5e674933bb381d854c02512d2d9</id>
<content type='text'>
At present only bridge devices are bound before relocation, to save space
in pre-relocation memory. In some cases we do actually want to bind a
device, e.g. because it provides the console UART. Add a devicetree
binding to support this.

Use the PCI_VENDEV() macro to encode the cell value. This is present in
U-Boot but not used, so move it to the binding header-file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
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<pre>
At present only bridge devices are bound before relocation, to save space
in pre-relocation memory. In some cases we do actually want to bind a
device, e.g. because it provides the console UART. Add a devicetree
binding to support this.

Use the PCI_VENDEV() macro to encode the cell value. This is present in
U-Boot but not used, so move it to the binding header-file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
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