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<title>u-boot.git/include/dt-bindings, branch v2022.04-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/include/dt-bindings?h=v2022.04-rc2</id>
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<updated>2022-02-08T16:00:03Z</updated>
<entry>
<title>dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode</title>
<updated>2022-02-08T16:00:03Z</updated>
<author>
<name>Swapnil Jakhade</name>
<email>sjakhade@cadence.com</email>
</author>
<published>2022-01-28T08:11:41Z</published>
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<id>urn:sha1:f74415a1ff0b90155067a714417e59827229aaf5</id>
<content type='text'>
Add binding to specify Spread Spectrum Clocking mode used

Signed-off-by: Swapnil Jakhade &lt;sjakhade@cadence.com&gt;
Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2</title>
<updated>2022-02-08T14:41:27Z</updated>
<author>
<name>Aswath Govindraju</name>
<email>a-govindraju@ti.com</email>
</author>
<published>2022-01-25T15:26:39Z</published>
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<id>urn:sha1:55e1d7477b6f3811442917e6a815c393238d0d8c</id>
<content type='text'>
Add pinctrl macros for J721S2 SoC. These macro definitions are
similar to that of J721E, but adding new definitions to avoid
any naming confusions in the soc dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC</title>
<updated>2022-02-08T14:41:27Z</updated>
<author>
<name>Aswath Govindraju</name>
<email>a-govindraju@ti.com</email>
</author>
<published>2022-01-25T15:26:38Z</published>
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<id>urn:sha1:4f260bbeeb3b53e7c4045db90f6516e1c6d5338d</id>
<content type='text'>
There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
lane mux can select upto 4 different IPs. Define all the possible
functions.

Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: imx8mq kernel dts updates</title>
<updated>2022-02-05T14:49:02Z</updated>
<author>
<name>Angus Ainslie</name>
<email>angus@akkea.ca</email>
</author>
<published>2022-02-02T15:31:43Z</published>
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<id>urn:sha1:881c8a6154f9a8d203aa8d409e394519dea051b1</id>
<content type='text'>
Update to the 5.16 imx8mq dts files and dt bindings

Changes since v1:

Dropped rfkill.h that is not in linux mainline yet.

Signed-off-by: Angus Ainslie &lt;angus@akkea.ca&gt;
Reviewed-by: Fabio Estevam &lt;festevam@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy</title>
<updated>2022-02-05T14:49:01Z</updated>
<author>
<name>Richard Zhu</name>
<email>hongxing.zhu@nxp.com</email>
</author>
<published>2022-01-28T03:41:02Z</published>
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<id>urn:sha1:10a99f0c222e86ffad30f51be20fc04c76c9ae64</id>
<content type='text'>
Add binding for reference clock PAD modes of the i.MX8 PCIe PHY.

Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Tested-by: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Reviewed-by: Tim Harvey &lt;tharvey@gateworks.com&gt;
Tested-by: Tim Harvey &lt;tharvey@gateworks.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/1638432158-4119-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt; # Pick from Linux f6f787874aa5 ("dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy")
</content>
</entry>
<entry>
<title>ARM: dts: suniv: Add device tree files and bindings for F1C100s</title>
<updated>2022-02-04T00:09:57Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.io</email>
</author>
<published>2022-01-29T15:23:08Z</published>
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<id>urn:sha1:ce2b6c448193e64faaaa3237ff64e9c6961a6653</id>
<content type='text'>
Add device tree files for suniv and
Lichee Pi Nano it is a board based on F1C100s.
dt-bindings/dts are synced with 5.16.0

Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Signed-off-by: Jesse Taube &lt;Mr.Bossman075@gmail.com&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2022.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2022-01-19T16:43:44Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-01-19T16:43:44Z</published>
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<id>urn:sha1:068415eadefbbc81f14d4ce61fcf7a7eb39650d4</id>
<content type='text'>
Xilinx changes for v2022.04-rc1

gpio:
- Add modepin driver

net:
- Save random mac addresses to eth variable

zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses

zynqmp clk:
- Fix clock handling for gem and usb

phy:
- Add zynqmp phy/serdes driver

serial:
- Add one missing compatible string

microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups

zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver

versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
</content>
</entry>
<entry>
<title>ARM: dts: sync Actions Semi S700 DT from Linux v5.16-rc3</title>
<updated>2022-01-18T17:48:17Z</updated>
<author>
<name>Amit Singh Tomar</name>
<email>amittomer25@gmail.com</email>
</author>
<published>2021-12-02T18:23:28Z</published>
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<id>urn:sha1:a7e7baea0a12decfb3e4cfae8b7c08ac48ad1bae</id>
<content type='text'>
This Synchronizes the Actions Semi S700 SoC DT changes from
commit "g58e1100fdc59" ("Linux v5.16-rc3").

Signed-off-by: Amit Singh Tomar &lt;amittomer25@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: phy: add TI DP83869HM ethernet driver</title>
<updated>2022-01-15T16:50:16Z</updated>
<author>
<name>Dominic Rath</name>
<email>rath@ibv-augsburg.net</email>
</author>
<published>2021-12-22T07:57:46Z</published>
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<id>urn:sha1:f3e22eea815d99f025aed505eefeffbbf699f845</id>
<content type='text'>
This driver is based on an older downstream TI kernel, with
changes and cleanups to work with mainline device-tree bindings.

Signed-off-by: Dominic Rath &lt;rath@ibv-augsburg.net&gt;
Signed-off-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
Reviewed-by: Ramon Fried &lt;rfried.dev@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: versal: Add new PM_DEV_I2C_PMC macro</title>
<updated>2022-01-05T10:16:21Z</updated>
<author>
<name>Sandeep Gundlupet Raju</name>
<email>sandeep.gundlupet-raju@xilinx.com</email>
</author>
<published>2021-11-30T12:56:58Z</published>
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<id>urn:sha1:ac64f536af078a2e5a9dce984b0e42d92e87f87e</id>
<content type='text'>
Add new macro for PMC I2C power domain.

Signed-off-by: Sandeep Gundlupet Raju &lt;sandeep.gundlupet-raju@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Link: https://lore.kernel.org/r/0bf164f937df551d689dda2a35f9489c2e46b4ab.1638277017.git.michal.simek@xilinx.com
</content>
</entry>
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