u-boot.git/include/fdtdec.h, branch v2015.07 Unnamed repository; edit this file 'description' to name the repository. dm: usb: tegra: Drop legacy USB code 2015-06-11T01:26:55+00:00 Simon Glass sjg@chromium.org 2015-03-25T18:23:06+00:00 257bfd2e215ff02aacce23e14bf17b61524a723f Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> 
Drop the code that doesn't use driver model for USB.

Signed-off-by: Simon Glass <sjg@chromium.org>
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig 2015-06-11T01:26:55+00:00 Simon Glass sjg@chromium.org 2015-03-06T20:19:03+00:00 af282245462186b8b06047c379ee85f4d0ec7a9c Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> 
Move this over to Kconfig and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
x86: gpio: add pinctrl support from the device tree 2015-06-04T09:32:08+00:00 Gabriel Huau contact@huau-gabriel.fr 2015-05-26T05:27:37+00:00 5318f18d2c002f505054b90bb95ba7c53532eedf Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> 
Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.

Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
x86: Refactor PIRQ routing support 2015-06-04T08:39:39+00:00 Bin Meng bmeng.cn@gmail.com 2015-05-25T14:35:04+00:00 9c7dea602edd9027848d312e9b3b69f06c15f163 PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
PIRQ routing is pretty much common in Intel chipset. It has several
PIRQ links (normally 8) and corresponding registers (either in PCI
configuration space or memory-mapped IBASE) to configure the legacy
8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing
support using device tree and move it to a common place, so that we
can easily add PIRQ routing support on a new platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
tegra: video: Support serial output resource (SOR) on tegra124 2015-05-13T16:24:11+00:00 Simon Glass sjg@chromium.org 2015-04-15T03:03:40+00:00 00f37327524d51b46a601fb104e5d6cc0590979a The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> 
The SOR is required for talking to eDP LCD panels. Add a driver for this
which will be used by the DisplayPort driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
fdt: Add binding decode function for display-timings 2015-05-13T16:24:06+00:00 Simon Glass sjg@chromium.org 2015-04-15T03:03:21+00:00 12e671142daa5d4dce5961e6f573a8b740b16f88 This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
This is useful for display parameters. Add a simple decode function to read
from this device tree node.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
dm: usb: exynos: Drop legacy USB code 2015-05-06T20:00:35+00:00 Simon Glass sjg@chromium.org 2015-03-25T18:23:07+00:00 f56da290b8df14a058b43735494dbbb0f8521a89 Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> 
Drop the code that doesn't use driver model for USB.

Signed-off-by: Simon Glass <sjg@chromium.org>
dm: core: Select device tree control correctly for SPL 2015-04-23T15:05:54+00:00 Simon Glass sjg@chromium.org 2015-02-28T05:06:41+00:00 b2b0d3e7129d4e59be1a016ad4fb05db87b8c5b4 Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> 
Some boards will not use device tree for SPL even with driver model. Add
the logic to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
fdt: Rename setup_fdt() and make it prepare also 2015-04-23T15:05:53+00:00 Simon Glass sjg@chromium.org 2015-02-28T05:06:35+00:00 0879361fd3bc33eb52bcfb2574a78f1e52a36429 There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> 
There is little reason to split these two functions. Bring them together
which simplifies the init sequence.

Signed-off-by: Simon Glass <sjg@chromium.org>
fdt: sandbox: Move setup code from board_f to fdtdec 2015-04-23T15:05:53+00:00 Simon Glass sjg@chromium.org 2015-02-28T05:06:34+00:00 b45122fdf5d314ef1f492b051fb104a7b48b8079 We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> 
We want to be able to set up the device tree in SPL, so move this code
to a common place.

Signed-off-by: Simon Glass <sjg@chromium.org>