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<title>u-boot.git/include/fm_eth.h, branch v2018.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06+00:00</published>
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<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/fm: fix MDIO controller base on FMAN2</title>
<updated>2015-10-29T17:34:00+00:00</updated>
<author>
<name>Shaohui Xie</name>
<email>Shaohui.Xie@freescale.com</email>
</author>
<published>2015-10-26T11:47:49+00:00</published>
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<id>23e1acaf4b2863917247a925c81f6ce5a4eadcc2</id>
<content type='text'>
MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two
FMANs, so we should only define MDIO controller base on FMAN2 when there
is FMAN2.

Signed-off-by: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Signed-off-by: Mingkai Hu &lt;Mingkai.Hu@freescale.com&gt;
Signed-off-by: Gong Qianyu &lt;Qianyu.Gong@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
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<pre>
MDIO controller base on FMAN2 was defined as CONFIG_SYS_FSL_FM2_ADDR
plus offset, but CONFIG_SYS_FSL_FM2_ADDR only defined when there are two
FMANs, so we should only define MDIO controller base on FMAN2 when there
is FMAN2.

Signed-off-by: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Signed-off-by: Mingkai Hu &lt;Mingkai.Hu@freescale.com&gt;
Signed-off-by: Gong Qianyu &lt;Qianyu.Gong@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/fman: update 10GEC to fit new SoC</title>
<updated>2014-12-05T16:06:15+00:00</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@freescale.com</email>
</author>
<published>2014-11-24T09:11:57+00:00</published>
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<content type='text'>
fm_standard_init() initializes each 10G port by FM_TGEC_INFO_INITIALIZER.
but it needs different implementation of FM_TGEC_INFO_INITIALIZER on different SoCs.
on SoCs earlier(e.g. T4240, T2080), the notation between 10GEC and MAC as below:
	10GEC1-&gt;MAC9, 10GEC2-&gt;MAC10, 10GEC3-&gt;MAC1, 10GEC4-&gt;MAC2
on SoCs later(e.g. T1024, etc), the notation between 10GEC and MAC as below:
	10GEC1-&gt;MAC1, 10GEC2-&gt;MAC2

so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to fit the new SoCs on
which 10GEC enumeration is consistent with MAC enumeration.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
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<pre>
fm_standard_init() initializes each 10G port by FM_TGEC_INFO_INITIALIZER.
but it needs different implementation of FM_TGEC_INFO_INITIALIZER on different SoCs.
on SoCs earlier(e.g. T4240, T2080), the notation between 10GEC and MAC as below:
	10GEC1-&gt;MAC9, 10GEC2-&gt;MAC10, 10GEC3-&gt;MAC1, 10GEC4-&gt;MAC2
on SoCs later(e.g. T1024, etc), the notation between 10GEC and MAC as below:
	10GEC1-&gt;MAC1, 10GEC2-&gt;MAC2

so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to fit the new SoCs on
which 10GEC enumeration is consistent with MAC enumeration.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: Merge asm/fsl_enet.h into fsl_mdio.h</title>
<updated>2014-09-08T17:30:33+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@freescale.com</email>
</author>
<published>2014-09-05T05:52:36+00:00</published>
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<id>93f26f130eede8db0cb47afcaf66016987b91731</id>
<content type='text'>
fsl_enet.h defines the mapping of the usual MII management
registers, which are included in the MDIO register block
common to Freescale ethernet controllers. So it shouldn't
depend on the CPU architecture but it should be actually
part of the arch independent fsl_mdio.h.

To remove the arch dependency, merge the content of
asm/fsl_enet.h into fsl_mdio.h.
Some files (like fm_eth.h) were simply including fsl_enet.h
only for phy.h. These were updated to include phy.h instead.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</content>
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<pre>
fsl_enet.h defines the mapping of the usual MII management
registers, which are included in the MDIO register block
common to Freescale ethernet controllers. So it shouldn't
depend on the CPU architecture but it should be actually
part of the arch independent fsl_mdio.h.

To remove the arch dependency, merge the content of
asm/fsl_enet.h into fsl_mdio.h.
Some files (like fm_eth.h) were simply including fsl_enet.h
only for phy.h. These were updated to include phy.h instead.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/fman: Add support for 10GEC3 and 10GEC4</title>
<updated>2013-11-25T19:43:47+00:00</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@freescale.com</email>
</author>
<published>2013-11-22T09:39:09+00:00</published>
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<id>82a55c1ef87bb6c596b19e83685cc4cbf0344cb3</id>
<content type='text'>
There are more than two 10GEC in single FMAN in some SoCs(e.g. T2080).
This patch adds support for 10GEC3 and 10GEC4.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
</content>
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<pre>
There are more than two 10GEC in single FMAN in some SoCs(e.g. T2080).
This patch adds support for 10GEC3 and 10GEC4.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/fman: add a fm_enable_port function</title>
<updated>2013-10-24T16:35:59+00:00</updated>
<author>
<name>Valentin Longchamp</name>
<email>valentin.longchamp@keymile.com</email>
</author>
<published>2013-10-18T09:47:21+00:00</published>
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<id>f51d3b71d4d3eacfbbc6e2cf3fa197774df5f638</id>
<content type='text'>
This can be useful if one wants to disable an interface in u-boot
because u-boot should not manage it but then later reenable it for FDT
fixing or if the kernel uses this interface.

Signed-off-by: Valentin Longchamp &lt;valentin.longchamp@keymile.com&gt;
[York Sun: fix conflict in fm_eth.h]
Acked-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
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<pre>
This can be useful if one wants to disable an interface in u-boot
because u-boot should not manage it but then later reenable it for FDT
fixing or if the kernel uses this interface.

Signed-off-by: Valentin Longchamp &lt;valentin.longchamp@keymile.com&gt;
[York Sun: fix conflict in fm_eth.h]
Acked-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII mode</title>
<updated>2013-10-16T23:13:11+00:00</updated>
<author>
<name>Zhao Qiang</name>
<email>B45475@freescale.com</email>
</author>
<published>2013-09-04T02:11:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ffee1dde3c4cb2721c56c78e0360affec1c23d3f'/>
<id>ffee1dde3c4cb2721c56c78e0360affec1c23d3f</id>
<content type='text'>
Fix PHY addresses for QSGMII Riser Card working in
SGMII mode on board P3041/P5020/P4080/P5040/B4860.

QSGMII Riser Card can work in SGMII mode, but
having the different PHY addresses.
So the following steps should be done:
	1. Confirm whether QSGMII Riser Card is used.
	2. If yes, set the proper PHY address.
Generally, the function is_qsgmii_riser_card() is
for step 1, and set_sgmii_phy() for step 2.

However, there are still some special situations,
take P5040 and B4860 as examples, the PHY addresses
need to be changed when serdes protocol is changed,
so it is necessary to confirm the protocol before
setting PHY addresses.

Signed-off-by: Zhao Qiang &lt;B45475@freescale.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix PHY addresses for QSGMII Riser Card working in
SGMII mode on board P3041/P5020/P4080/P5040/B4860.

QSGMII Riser Card can work in SGMII mode, but
having the different PHY addresses.
So the following steps should be done:
	1. Confirm whether QSGMII Riser Card is used.
	2. If yes, set the proper PHY address.
Generally, the function is_qsgmii_riser_card() is
for step 1, and set_sgmii_phy() for step 2.

However, there are still some special situations,
take P5040 and B4860 as examples, the PHY addresses
need to be changed when serdes protocol is changed,
so it is necessary to confirm the protocol before
setting PHY addresses.

Signed-off-by: Zhao Qiang &lt;B45475@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19+00:00</published>
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<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
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<pre>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Fman/t4240: some fix for 10G XAUI</title>
<updated>2013-05-14T21:00:26+00:00</updated>
<author>
<name>Shaohui Xie</name>
<email>Shaohui.Xie@freescale.com</email>
</author>
<published>2013-03-25T07:33:17+00:00</published>
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<content type='text'>
1. fix 10G mac offset by plus 8;
2. add second 10G port info for FM1 &amp; FM2 when init ethernet info;
3. fix 10G lanes name to match lane protocol table;

Signed-off-by: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
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<pre>
1. fix 10G mac offset by plus 8;
2. add second 10G port info for FM1 &amp; FM2 when init ethernet info;
3. fix 10G lanes name to match lane protocol table;

Signed-off-by: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fm/mEMAC: add mEMAC frame work</title>
<updated>2012-10-22T19:31:25+00:00</updated>
<author>
<name>Roy Zang</name>
<email>tie-fei.zang@freescale.com</email>
</author>
<published>2012-10-08T07:44:21+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=111fd19e3b9eb1005fd24ef09c163dd10103f5fa'/>
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<content type='text'>
The multirate ethernet media access controller (mEMAC) interfaces to
10Gbps and below Ethernet/IEEE 802.3 networks via either RGMII/RMII
interfaces or XAUI/XFI/SGMII/QSGMII using the high-speed SerDes interface.

Signed-off-by: Sandeep Singh &lt;Sandeep@freescale.com&gt;
Signed-off-by: Poonam Aggrwal &lt;poonam.aggrwal@freescale.com&gt;
Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
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<pre>
The multirate ethernet media access controller (mEMAC) interfaces to
10Gbps and below Ethernet/IEEE 802.3 networks via either RGMII/RMII
interfaces or XAUI/XFI/SGMII/QSGMII using the high-speed SerDes interface.

Signed-off-by: Sandeep Singh &lt;Sandeep@freescale.com&gt;
Signed-off-by: Poonam Aggrwal &lt;poonam.aggrwal@freescale.com&gt;
Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
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