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<title>u-boot.git/include/fpga.h, branch v2018.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>cmd: fpga: Add support to load secure bitstreams</title>
<updated>2018-06-01T09:37:31+00:00</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2018-05-31T09:40:22+00:00</published>
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<content type='text'>
This patch adds support to load secure bitstreams(authenticated or
encrypted or both). As of now, this feature is added and tested only
for xilinx bitstreams and the secure bitstream was generated using
xilinx bootgen tool, but the command is defined in more generic way.

Command example to load authenticated and device key
encrypted bitstream is as follows
"fpga loads 0 100000 2000000 0 1"

Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
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<pre>
This patch adds support to load secure bitstreams(authenticated or
encrypted or both). As of now, this feature is added and tested only
for xilinx bitstreams and the secure bitstream was generated using
xilinx bootgen tool, but the command is defined in more generic way.

Command example to load authenticated and device key
encrypted bitstream is as follows
"fpga loads 0 100000 2000000 0 1"

Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06+00:00</published>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: allow programming fpga from FIT image for all FPGA drivers</title>
<updated>2017-12-14T15:09:39+00:00</updated>
<author>
<name>Goldschmidt Simon</name>
<email>sgoldschmidt@de.pepperl-fuchs.com</email>
</author>
<published>2017-11-10T14:17:41+00:00</published>
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<content type='text'>
This drops the limit that fpga is only loaded from FIT images for Xilinx.
This is done by moving the 'partial' check from 'common/image.c' to
'drivers/fpga/xilinx.c' (the only driver supporting partial images yet)
and supplies a weak default implementation in 'drivers/fpga/fpga.c'.

Signed-off-by: Simon Goldschmidt &lt;sgoldschmidt@de.pepperl-fuchs.com&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt; (On zcu102)
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
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<pre>
This drops the limit that fpga is only loaded from FIT images for Xilinx.
This is done by moving the 'partial' check from 'common/image.c' to
'drivers/fpga/xilinx.c' (the only driver supporting partial images yet)
and supplies a weak default implementation in 'drivers/fpga/fpga.c'.

Signed-off-by: Simon Goldschmidt &lt;sgoldschmidt@de.pepperl-fuchs.com&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt; (On zcu102)
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>fpga: Add bitstream type BIT_NONE</title>
<updated>2016-01-27T14:55:54+00:00</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2015-12-09T13:16:42+00:00</published>
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<id>ddbcf8f2c2d1be734c91948a0c1b676a5eb5087f</id>
<content type='text'>
Add bitstream type BIT_NONE to the bitstream type
enum. This might be useful while loading bitstreams
in respective drivers.

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
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<pre>
Add bitstream type BIT_NONE to the bitstream type
enum. This might be useful while loading bitstreams
in respective drivers.

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Export fpga_get_desc for SPL</title>
<updated>2015-01-21T09:25:02+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2015-01-13T15:09:53+00:00</published>
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<id>ebd322de43d7d43dd59955aa58952bafa95cfd4a</id>
<content type='text'>
SPL needs to detect FPGA device which will be used
for loading bitstream.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
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<pre>
SPL needs to detect FPGA device which will be used
for loading bitstream.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Remove extern prototypes from .h</title>
<updated>2015-01-21T09:25:01+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2015-01-14T08:59:00+00:00</published>
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<id>6583505c23207e25a1b736aeaf207122d468d671</id>
<content type='text'>
This problem is reported by checkpatch.pl
Warnings:
CHECK: extern prototypes should be avoided in .h files

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
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<pre>
This problem is reported by checkpatch.pl
Warnings:
CHECK: extern prototypes should be avoided in .h files

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Added support to load bit stream from SD/MMC</title>
<updated>2014-05-20T13:23:46+00:00</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2014-03-14T11:05:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1a897668ac33c57ca76f47cb940ec32b405e90dd'/>
<id>1a897668ac33c57ca76f47cb940ec32b405e90dd</id>
<content type='text'>
Added support to load a bitstream image in chunks by reading it in
chunks from SD/MMC.
Command format:
loadfs [dev] [address] [image size] [blocksize] &lt;interface&gt;
       [&lt;dev[:part]&gt;] &lt;filename&gt;
Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
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<pre>
Added support to load a bitstream image in chunks by reading it in
chunks from SD/MMC.
Command format:
loadfs [dev] [address] [image size] [blocksize] &lt;interface&gt;
       [&lt;dev[:part]&gt;] &lt;filename&gt;
Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Add support to load partial bitstreams</title>
<updated>2014-05-20T13:23:46+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2014-05-02T11:43:39+00:00</published>
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<id>67193864bce78b38fda2c73b9918403d1c572fcc</id>
<content type='text'>
Added support to load partial bitstreams.
The partial bitstreams can be loaded using the below commands
Commands:
fpga loadp &lt;dev&gt; &lt;addr&gt; &lt;size&gt;
fpga loadbp &lt;dev&gt; &lt;addr&gt; &lt;size&gt;
The full bit streams can be loaded using the
old commands(fpga load and fpga loadb).

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
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<pre>
Added support to load partial bitstreams.
The partial bitstreams can be loaded using the below commands
Commands:
fpga loadp &lt;dev&gt; &lt;addr&gt; &lt;size&gt;
fpga loadbp &lt;dev&gt; &lt;addr&gt; &lt;size&gt;
The full bit streams can be loaded using the
old commands(fpga load and fpga loadb).

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: Define bitstream type based on command selection</title>
<updated>2014-05-20T13:23:46+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2014-05-02T12:09:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a78bd2679ce3287cfc44f69fd7bc554d0261cf6'/>
<id>7a78bd2679ce3287cfc44f69fd7bc554d0261cf6</id>
<content type='text'>
Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
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<pre>
Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19+00:00</published>
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<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
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<pre>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
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</entry>
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